Intel Corporation

Yah Chen Chew

Vui Yong Liew

Alvin Shing Chye Goh

Terrence Huat Hin Tan

Wei Ming Lim

Kim Leong Lee

Madhu Rao

Methods and apparatus for predictable protocol aware testing on a memory interface are are shown. An apparatus to support a protocol aware testing on a memory interface may include a digital controller to receive a plurality of read request commands from a unit under test. The digital controller further to hold the plurality of read request commands while a hold signal has a first value, and to sequentially release individual read request commands of the plurality of read request commands while to the hold signal has a second value. The digital controller further to provide input/output (I/O) commands to an output based on a particular released read request command of the plurality of read request commands. Timing of provision of the I/O commands is deterministic based on a transition of the hold signal from the first value to the second value.

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Sungai Petani, Malaysia

Yah Chen Chew