Wuhan China Star Optoelectronics Technology Co., Ltd.

Shenzhen China Star Optoelectronics Technology Co., Ltd.

Yafeng Li

Jian Tao

Jinfang Wu

Xiangyi Peng

Mang Zhao

Bo Yang

Chi Zhang

Yong Fu Wang

Yue Wang

Shuai Feng

Zhong Peng

Jian He

Yun Xiang

The present application sets forth an array substrate and a display terminal. The array substrate includes an underlay, a light shielding layer disposed on the underlay, an active layer disposed on the light shielding layer, and a connection element disposed on the active layer. The light shielding layer includes light shielding portions spaced from one another. The active layer includes active portions spaced from one another. The active portions correspond to the light shielding portions. Furthermore, adjacent two active portions are electrically connected through a bridge element. A toughness of the bridge element is greater than a toughness of the active portion.

Array substrate and display terminal

A multiplexed display panel and device and a driving method for the multiplexed display panel are provided. At the moment when a switching switch is turned on, a potential of a fanout line corresponding to a data line connected to sub-pixels, into which an data signal is input, is adjusted to the same level as a potential of the data line as much as possible, and a potential difference between each fanout line and the corresponding data line is relatively small at the moment when the switching switch is turned on, so that an instantaneous current at this moment is greatly reduced without causing relatively large jump of the potential of the data line, a common electrode and back-plated indium tin oxide (ITO) greatly fluctuate, and then the surface noise generated by the display panel is turned on is greatly reduced.

Multiplexed display panel preventing surface noise generated during switching of switching transistor, multiplexed display device and driving method for multiplexed display panel

The present application discloses a display panel and a display device. The display panel includes a plurality of multiplexing drive modules, a plurality of drive branches and M drive buses. By electrically connecting one drive bus to N drive branches, the number of used drive buses can be reduced, thereby reducing the number of output channels of a drive signal source. Sine the number of used drive buses is reduced, the multiplexing drive modules can complete transmission of a frame of data signals using a less number of times of time-divisional parts for switching on transistors.

Display panel and display device

A GOA circuit and a display panel are provided. The GOA circuit includes a first pull-down module for pulling down a voltage level of a current-stage gate driving signal, a second pull-down module for pulling down a voltage level of the first node, a third pull-down module for pulling down a voltage level of the second node, and a fourth pull-down module for pulling down the voltage level of the current-stage gate driving signal. The GOA circuit raises the effect of pulling down the current-stage gate driving signal.

GOA circuit and display panel

A gate driver on array (GOA) circuit is provided. The GOA circuit includes a plurality of cascading GOA units. One of the GOA unit includes: a scan control module, an anti-backfill module connected to a constant high-level signal and the scan control module, a cascading reset module, and a gate signal output module. Base on functions of prior art solution, the provided GOA circuit of the disclosure reduces two types of signal to simplify signal traces at the bezel to realize a narrow bezel design.

GOA circuit and display panel thereof

The present application provides a liquid crystal display panel and a display device. Invalid pixels of the liquid crystal display panel include a test pixel. In this structure, when no tests are required, the test pixel is in an off state, and there is no voltage difference between a pixel electrode and a common electrode to cause rotation of liquid crystals. When a test is required, the test pixel is in an on state, and the pixel electrode is disconnected from the common electrode to cause a voltage difference, so that the liquid crystals are normally rotated.

Liquid crystal display panel and display device

Disclosed are a gate driving circuit, a driving method thereof, and a display device which comprises the gate driving circuit. In the gate driving circuit, the Qnode in the nstage circuit is precharged when an output signal of a Qnode in a previous stage driving circuit and an output signal of a Qnode in a next stage driving circuit are both in a high-level state. Both the Q&#x2212;1 node and the Qnode are at low levels when the gate driving circuit is in an All Gate On display state, and thus a possibility of current leakage from the Qnode can be substantially reduced.

Gate driving circuit, driving method thereof, and display device

The invention provides a GOA circuit. The first node control module of the GOA circuit provided by the invention comprises a tenth TFT, an eleventh TFT and a twelfth TFT of N-type TFTs, when the voltage of the first node is high, the gate-to-source voltage difference of the twelfth TFT is the threshold voltage thereof, so that the drain-source voltage difference of the eleventh TFT is also the threshold voltage of the twelfth TFT, thereby making the resistance between the drain of the tenth TFT and the first node is extremely large, which can avoid the impact of leakage current generated by the tenth TFT on the voltage of the first node when the noise and coupling in the second node occurs, and to ensure the normal output of the scan signal.

GOA circuit

The present disclosure provides a display panel including a display area and a non-display area, a base substrate, a plurality of thin film transistors, a plurality of touch signal lines, a first test signal line area, an array substrate row driving circuit, a second test signal line area, a ground line area and an insulating layer. The thin film transistor includes a gate, a gate insulating layer, a source and a drain. The non-display area includes a first side and a second side; the array substrate row driving circuit respectively forms a first gap and a second gap with the first test signal line area and the second test signal line area, an orthographic projection of the ground line area on the base substrate is in the projection of the second test signal line area in the base substrate. The present disclosure also provides a display device.

Disclosed is a gate driving circuit and a display device, which belongs to the technical field of displaying, and resolves a technical problem that a signal transmitted between cascaded gate driving circuits is easily attenuated in the prior art. The gate driving circuit includes a precharging unit circuit, an output unit circuit, and a compensation charging unit circuit; the output unit circuit includes a first reference point and a first clock signal line; and the precharging unit circuit is configured to input a high level to the first reference point before an output period.

Gate driving circuit and display device

Disclosed are a gate driving circuit and a driving method thereof, and a display device using the driving circuit. In the gate driving circuit, a Qnode in a n-stage circuit is precharged when a Qnode output signal in a previous-stage driving circuit and a Qnode output signal in a next-stage driving circuit are both at high levels, and thus stability of a Goutput end in the n-stage circuit can be greatly improved. Meanwhile, a first transistor and a second transistor are connected in series, and a third transistor and a fourth transistor are connected in series.

Gate driving circuit, driving method, and display device

A scanning driving circuit includes a scanning-level-signal-generation module and a scanning-signal-output-module. The scanning-level-signal-generation module is configured to input an (N&#x2212;1)th stage scanning signal, an (N+1)th stage scanning signal, and a reset signal, generate a scanning level signal based on the (N&#x2212;1)th stage scanning signal, the (N+1)th stage scanning signal, and the reset signal, and hold the scanning level signal. The scanning-signal-output-module, connected to the scanning-level-signal-generation module, is configured to input a clock signal, and configured to output a scanning signal based in the scanning level signal and the clock signal.

Scanning driver circuit and liquid crystal display panel

Disclosed is a gate driving circuit and a display device, which solve the technical problem that the prior art is easy to cause abnormal output of gate driving signals. The gate driving circuit includes a precharge unit circuit, an output unit circuit, and a holding unit circuit. The output unit circuit includes a first reference point and a clock signal line. The holding unit circuit includes a second reference point and a holding signal line, and a holding capacitor is connected between the second reference point and the holding signal line.

The present application discloses a scanning driving circuit and a flat display apparatus, the scanning driving circuit includes a plurality of cascaded scanning driving unit, each scanning driving unit including a forward and reverse scanning circuit for controlling the forward or reverse scanning; an input circuit to perform charging to the pull-up control signal point and the pull-down control signal point; an output circuit for generating a scanning driving signal with two-valued high electrical level and outputting to the current level scanning line to drive a pixel unit.

Scan driver circuit and liquid crystal display device having the circuit

The present disclosure proposes a GOA circuit having GOA units connected in a serial. Each GOA unit includes a scan-control module, an output module, a pull-down module, and an output adjusting module. By using the output adjusting module formed by a ninth TFT, a tenth TFT, an eleventh TFT, and a twelfth TFT, the voltage level of a fourth node transits between the high voltage level and the low voltage level with the second clock signal in either forward scanning or backward scanning. Compared with the conventional technology where the high and low voltage levels of the output terminal are mainly realized using the second TFT, the GOA circuit realizes that the output ability of the output terminal enhances and the charging capacity of in-plane pixels upgrades in the same period of time to improve the display effect of the liquid crystal panel.

Growing community of inventors

Wuhan, China

Yafeng Li