Cadence Design Systems, Inc.

Yael Kinderman

Oded Oren

Yosinori Watanabe

Michele Petracca

Shlomi Uziel

Ohad Givaty

Ido Avraham

Nili Segal

Hemant Gupta

Reshef Meir

Amos Noy

Marat Teplitsky

Efrat Gavish

Vincent Gregory Reynolds

Yoav Hollander

Vitaly Lagoon

David Spatafore

Amit Metodi

Raz Azaria

Amit Gal

Meirav O Nitzan

Yan Yagudayev

Yaara Gradovitch

Erez Bashi

A method for optimizing a verification regression includes obtaining data, by a processor, of previously executed runs of at least one verification regression session; extracting from the data, by the processor, values of one or a plurality of control knobs and values of one or a plurality verification metrics that were recorded during the execution for each of the previously executed runs of said at least one verification regression; finding, by the processor, correlation between said one or a plurality of the control knobs and each said one or a plurality of verification metrics, and generating a set of one or a plurality of control conditions based on the found correlation; and applying, by the processor, the generated set of one or a plurality of control conditions on the verification environment or on the DUT, or on both, to obtain a new verification regression session.

Method and system for optimizing a verification test regression

A method including receiving a first configuration of a device validated against a design constraint, is provided. A configuration includes stimuli controls and stimuli parameters used as inputs in a device model. The method includes determining a quality of the first configuration based on an estimation of an output parameter including a desired behavior of the device, simulating the device in the first configuration when the first configuration quality overcomes a threshold, and requesting a second configuration of the device when the quality of the first configuration is below the selected threshold. The method also includes obtaining a regression based on multiple, high quality configurations to determine, for the device, a distribution of output parameter values and comparing the distribution of output parameter values with a baseline of a random regression to adjust the machine learning engine according to a target range of output parameter values.

Constrained metric optimization of a system on chip

A method for combining verification data may include using a processor, obtaining verification data and a verification model from each of a plurality of verification engines relating to different verification methods, the verification data relating to a plurality of verification tests that were conducted on a design under test (DUT) using the plurality of verification engines; using a processor, merging the verification models obtained from the plurality of verification engines into a merged verification model; using a processor, calculating a combined verification metric grade for a plurality of verification entities in the merged verification model using verification metric grades for each of the plurality of verification entities calculated from the verification data obtained from the plurality of engines and applying a combined verification metric grade rule; and outputting the combined verification metric grade via an output device.

Method and system for verification using combined verification data

A method including selecting multiple input parameters of a device configuration environment to perform multiple simulations on an electronic device defined by the device configuration environment is provided. The method with multiple values for the multiple input parameters and a value of an output parameter resulting from the multiple simulations, and extracting a distribution of output parameter values and a distribution of input parameter values from a database. The method also includes finding a correlation involving the multiple input parameters and the output parameter based on a target range of the output parameter, and identifying an expected value of the output parameter using a range of values of the multiple input parameters in the correlation involving the multiple input parameters and the output parameter. A system and a nontransitory, computer-readable medium including instructions to perform the above method are also provided.

Constrained metric verification analysis of a system on chip

A method for reuse of a refinement file in coverage grading, may include obtaining a refinement file that includes a listing of coverage entities of a first coverage model, for exclusion from a calculation of coverage grading of the first coverage model; obtaining mapping information to map a source path of each of the modules or instances of a module, that include one or more of said coverage entities in the first coverage model to a target path of each of said modules or instances of a module in a second coverage model; and using a processor, based on the refinement file and the mapping information, translating a source path of each of said coverage entities listed in the refinement file to a target path of a coverage entity of the coverage entities in the second coverage model.

Method and system for reusing a refinement file in coverage grading

A method for performing a regression session when testing a device under test (DUT), may include a. obtaining a coverage model of the DUT, and a verification session input file (VSIF) relating to a plurality of tests to be run on the DUT, the VSIF including an initial number of runs associated with each of the tests of the plurality of tests; b. performing a first iteration of the regression session in which each of the tests of the plurality of tests is run the initial number of runs associated with that test; c. calculating for that iteration an effectiveness grade of each run of the tests of the plurality of tests, and assigning a weight to each of the runs of the tests of the plurality of tests corresponding to the calculated effectiveness grade of that test run; an d. Iteratively performing further iterations of the regression session in each of which each of the tests of the plurality of tests is run a number of runs corresponding to the weight assigned to that test run in a previous iteration; and calculating for that iteration a new effectiveness grade of each run of the tests of the plurality of tests, and assigning a new weight to each of the runs of the tests of the plurality of tests, wherein the new effectiveness grade and the new weight are used as the effectiveness grade and the weight, respectively, in a consecutive iteration of the iteratively performed further iterations.

Method and system for performing regression session on a device under test

A method includes receiving from a user, via a user interface, coverage-event characteristics. Using a processor, output data of test runs executed on a device-under-test is analyzed to identify one or a plurality of coverage events that possess the coverage-event characteristics and to identify one or a plurality of contributing test runs in said test runs that contributed to said one or a plurality of coverage events. Information on said one or a plurality of contributing test runs is outputted via an output device.

Method and system for automatically identifying test runs contributing to coverage events of interest in verification test data

A method for automatically verifying validity of application of a refinement rule includes calculating a set of values that characterize a hierarchy of elements of the emulation. A currently calculated value for a first element at a first level of the hierarchy is compared with a previously calculated value that characterized the first element at a previous time. If the currently calculated value is the same as the previously calculated value, application of the refinement rule is determined to be valid for unnamed entities of the first element. If the currently calculated value is different from the previously calculated value, each currently calculated value that characterizes a lower level element at a lower level of the hierarchy is compared with a corresponding previously calculated value to identify a change and it is determined whether the change invalidates application of the refinement rule to an unnamed entity of the emulation.

Method and system of evaluation of validity of a refinement rule for a hardware emulation

System, method and computer readable medium are described. The method may include obtaining user defined distribution traits characterizing a random sub-space of a space of assignments for a set of generative variables. The method may further include applying the user defined distribution traits on the space of assignments for a set of generative variables to generate the random sub-space of the space of assignments for a set of generative variables. The method may also include testing a device under test using the generated random sub-space of the space of assignments for a set of generative variables.

Generation of a random sub-space of the space of assignments for a set of generative attributes for verification coverage closure

A computer implemented method and system for exclusion of entities from a metric driven verification analysis score. The method includes using a processor, and performing the following steps: parsing a source code simulating a device under test and modeling the source code into a model that includes entities of one or a plurality of metric driven entity types; identifying in the source code entities of the same metric driven entity type of said one or a plurality of metric driven entity types that are logically linked and saving information on the identified entities that are logically linked; receiving from a user a selection of an entity to be excluded from the metric driven verification analysis score; and excluding all instances of the selected entity and all instances of the identified entities that are logically linked to the selected entity from a calculation of the metric driven verification score.

Method and system for automated refined exclusion of entities from a metric driven verification analysis score

A method, system and computer readable medium for coverage driven generation of stimuli for DUT verification. The method may include receiving, via an input device, a generation model and a coverage model from a user. The method may also include using a processor, identifying a coverage item in the coverage model and finding a corresponding element in the generation model corresponding to the coverage item. The method may further include using a processor translating a coverage requirement associated with the coverage item into a distribution directive; and using a processor, solving the generation model with the distribution directive on the corresponding element, to obtain a set of stimuli.

Coverage driven generation of constrained random stimuli

Embodiments provide methods, systems, and devices involving transaction correlation tools that may record a limited number of run attributes yet are likely to be important in the debugging process. Some embodiments may include novel tabular representations of the runs. Embodiments may allow the user to specify directives for the recording of the runs and the creation of these tables. Embodiments may include comparing sets of failing and passing runs, which may be generated at random. This approach is called statistical debugging, as it employs statistical tools to find attributes of the DVE that tend to co-occur with the failure.

Transaction correlation system

Embodiments provide tools and techniques for clustering failing runs in a design verification environment to aid in determining causes of the failing runs. Embodiments may include determining multiple failing runs of the design verification environment. Multiple partitions of the multiple failing runs may be generated. Each respective partition may partition one or more subsets of the multiple failing runs into one or more non-overlapping clusters of failing runs. The multiple partitions of the subsets of multiple failing runs may be merged into a hierarchical structure that includes at least one of the clusters. One or more clusters of failing runs from the merged hierarchical structure may be selected; these may be referred to as core clusters. Core clusters may be presented to a user based on the size and distance between the clusters.

Coverage-based bug clustering

The present invention provides a system and method for resolving a test generation problem involving constraint resolution problems where a verification environment includes constraints that are suitable for resolution using one type of solver for a first domain and other constraints that are suitable for resolution using a different solver in a second domain. The invention further comprises variables and, in instances where at least one variable is in each of the first and second domains, using these solvers to restrict the set of permissible values of variables to be consistent in multiple domains, preferably in all relevant domains. A constraint resolution problem is divided into clusters of constraints connected within a domain, and connected clusters of clusters that are connected through shared variables that are subject to constraints in more than one cluster. A preferred solver is applied to constraints in each of various domains such that constraints in multiple clusters and domains in a connected cluster are consistent for connected constraints in a domain, and preferably all constraints in all clusters in all domains within the connected cluster are consistent.

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Giv′at-Shmuel, Israel

Yael Kinderman