Taiwan Semiconductor Manufacturing Comp. Ltd.

Ya-Wen Tseng

Tseng Chin Lo

Bo-Sen Chang

Chih-Ting Sun

Molly Chang

Geng-He Lin

Zi-Kuan Li

Wen-Chih Chiou

Weng-Jin Wu

Chao-Shun Hsu

Max Liu

Provided is a method for inserting a pre-designed filler cell, as a replacement to a standard filler cell, including identifying at least one gap among a plurality of functional cells. In some embodiments, a pre-designed filler cell is inserted within the at least one gap. By way of example, the pre-designed filler cell includes a layout design having a pattern associated with a particular failure mode. In various embodiments, a layer is patterned on a semiconductor substrate such that the pattern of the layout design is transferred to the layer on the semiconductor substrate. Thereafter, the patterned layer is inspected using an electron beam (e-beam) inspection process.

Integrated circuit filler and method thereof

Through substrate via barrier structures and methods are disclosed. In one embodiment, a semiconductor device includes a first substrate including an active device region disposed within isolation regions. A through substrate via is disposed adjacent to the active device region and within the first substrate. A buffer layer is disposed around at least a portion of the through substrate via, wherein the buffer layer is disposed between the isolation regions and the through substrate via.

Barrier structures and methods for through substrate vias

Growing community of inventors

Hsinchu, Taiwan

Ya-Wen Tseng