Chunghwa Picture Tubes, Ltd.

Ya-Ju Lu

Chin-Tzu Kao

Yen-Yu Huang

Wen-Cheng Lu

Yu-Chen Liu

Yu-Hsien Chen

Shin-Chuan Chiang

Kuo-Wei Wu

Hsiang-Hsien Chung

Chin-Hai Huang

En-Chih Liu

Yu-Fang Wang

Ming-Chu Chen

Chi-Ming Chiou

Jun-Yao Huang

Chun-Jen Ma

Jin-Chuan Kuo

Shang-Jung Yang

Chia-Wei Yu

An active device array substrate includes a substrate, first and second active devices, a gate insulation layer and an insulation barrier layer. The first and second active devices respectively includes first and second gate electrodes, first and second semiconductor blocks, first and second source electrodes, and first and second drain electrodes. A film layer of the second source electrode and the second drain electrode is the same with that of the first source electrode or the first drain electrode. The gate insulation layer is located between the first gate electrode and the first semiconductor block and between the second gate electrode and the second semiconductor block. The insulation barrier layer is disposed on the gate insulation layer, and covers the first semiconductor block. The insulation barrier layer has a first through hole for one of the first source electrode and the first drain electrode contacting the first semiconductor block.

Active device array substrate and manufacturing method thereof

A method of manufacturing a pixel structure of a liquid crystal display panel includes providing a substrate, forming a pixel electrode and a switch device that is electrically connected to the pixel electrode on the substrate, forming an insulating layer that covers the switch device and the pixel electrode on the substrate, forming a common electrode layer on the insulating layer, forming a patterned photoresist layer that includes a plurality of discontinuous patterns on the common electrode layer, performing a first etching process to remove a portion of the common electrode layer so as to forma patterned common electrode, performing a second etching process to remove part of a surface of the insulating layer so as to form a plurality of trenches, wherein the patterned common electrode does not cover the plurality of trenches, and removing the patterned photoresist layer.

Method of manufacturing pixel structure of liquid crystal display panel

A method for manufacturing a thin-film transistor (TFT) is provided, including the following steps. A gate is formed on a substrate. A gate insulating layer is formed on the gate. A patterned semiconductor layer is formed on the gate insulating layer. A source is formed on the patterned semiconductor layer. The peripheral portion of the source is oxidized to form an oxide layer, wherein the oxide layer covers the source and a portion of the patterned semiconductor layer. A protective layer and hydrogen ions are formed, wherein the protective layer covers the oxide layer and the patterned semiconductor layer. The patterned semiconductor layer not covered by the oxide layer is doped with the hydrogen ions to form a drain. A TFT is also provided.

TFT with oxide layer on IGZO semiconductor active layer

A pixel structure of a liquid crystal display panel includes a substrate, a switch device, a pixel electrode, an insulating layer, and a patterned common electrode. The switch device and the pixel electrode are disposed on the substrate, and the switch device is electrically connected to the pixel electrode. The insulating layer is disposed on the substrate and covers the switch device and the pixel electrode, wherein the insulating layer includes a plurality of trenches. The patterned common electrode is disposed on the insulating layer and does not cover the trenches. The pixel structure of the liquid crystal display panel and related manufacturing method are able to enhance the driving effect of the liquid crystal molecules, reduce the driving voltage and increase alignment performance of the alignment film.

Pixel structure of liquid crystal display panel and manufacturing method thereof

A manufacturing method of a thin film transistor includes the following steps. A substrate is provided first. A semiconductor layer is then formed on the substrate. Next, a photoresist pattern including a middle portion and two peripheral portions is formed on the semiconductor layer. The middle portion is disposed between two peripheral portions, and the thickness of the middle portion is greater than each of the peripheral portions. Next, an etching process is performed on the semiconductor layer for forming a patterned semiconductor layer. A photoresist ashing process is then performed to remove at least the peripheral portions of the photoresist pattern to form a channel defining photoresist pattern and expose two portions of the patterned semiconductor layer. Next, the patterned semiconductor layer is treated to form a semiconductor portion and two conductor portions. The channel defining photoresist pattern is then removed.

Thin film transistor and manufacturing method thereof

A double thin film transistor includes a first semiconductor layer, a gate, a second semiconductor layer, a first insulating layer, a second insulating layer, a first source, a first drain, a second source and a second drain. The first semiconductor layer is disposed over a substrate. The gate is disposed over the first semiconductor layer. The second semiconductor layer is disposed over the gate, and the first and second semiconductor layers are the same conductive type. The first insulating layer is disposed between the first semiconductor layer and the gate. The second insulating layer is disposed between the gate and the second semiconductor layer. The first source and the first drain are disposed between the substrate and the second insulating layer. The second source and the second drain are disposed over the second insulating layer.

Double thin film transistor structure with shared gate

The thin film transistor includes a gate, a gate insulating layer, a semiconductor layer, and a source and a drain. The gate insulating layer covers the gate. The semiconductor layer is located on the gate insulating layer which is disposed above the gate. The source and the drain are disposed above the gate insulating layer and are electrically connected to the semiconductor layer, respectively. The source and the drain are respectively located in different layers. A first contact resistance is existed between the semiconductor layer and the source, a second contact resistance is existed between the semiconductor layer and the drain, and. the first contact resistance is less than the second contact resistance.

Thin film transistor

Oxidizing the source and doping the drain of a thin-film transistor

The present invention provides a pixel structure including a substrate, a first metal pattern layer, an insulating layer, a second metal pattern layer, a passivation layer, and a conductive protection layer. The substrate has at least one pixel region. The first patterned metal layer is disposed on the substrate, and has a top surface. The insulating layer is disposed on the first patterned metal layer and the substrate, and is in contact with the top surface of the first patterned metal layer. The second patterned metal layer is disposed on the insulating layer in the pixel region, and includes a source and a drain. The passivation layer is disposed on the second patterned metal layer and the insulating layer. A top surface of the source is in contact with the passivation layer, and the conductive protection layer is disposed on the drain.

Pixel structure, array substrate and method of fabricating the same

A touch panel fabricating method is disclosed. A first conductive layer, a second conductive layer and a first photo-resist layer are sequentially formed on a substrate. Next, the first photo-resist layer is patterned by using a gray-level mask. Then, the first conductive layer and the second conductive layer are etched according to the patterned first photo-resist layer to define a plurality of first sensing electrodes. Then, an insulation layer is formed on the substrate and the first sensing electrodes. The insulation layer is patterned by using a gray-level mask. Then, a third conductive layer is formed on the patterned insulation layer. A second photo-resist layer is formed on the third conductive layer. The second photo-resist layer is patterned to expose partial third conductive layer. Then, the exposed third conductive layer is etched to define a plurality of second sensing electrodes.

Touch panel fabricating method

A method of manufacturing thin film transistor is provided, in which the method of manufacturing includes a new etching process of island semiconductor. The new etching process of island semiconductor is controlled by a flow rate of etching gas and a regulation of etching power. When etching the island semiconductor, a part of gate insulation layer exposed out of the island semiconductor is etched at the same time. Consequently, the thickness of gate insulation layer over the storage capacitance electrode is reduced, the distance between the pixel electrode and the storage capacitance electrode is decreased, and the storage capacitance of pixel is increased. Finally, the width of storage capacitance electrode is reduced appropriately and the aperture ratio of product is increased.

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Taipei, Taiwan

Ya-Ju Lu