Nan Ya Technology Corporation

Ya-Chih Wang

Wei-Cheng Shiu

Chiang-Lin Shih

Hai-Han Hung

Shing-Yih Shih

Yuan-Hsun Wu

Wen-Chieh Wang

Wen-Bin Wu

Chao-Wen Lay

Chien-Mao Liao

Kuo-Yao Cho

Chih-Huang Wu

Kuo-Kuei Fu

Shu-Hao Hsu

A method for forming a pattern includes steps of forming a patterned core layer on a substrate, conformally forming a spacer layer on the patterned core layer to form first concave portions, performing an etch back process to expose the patterned core layer, removing the exposed patterned core layer to form second concave portions, filling up the first concave portions and the second concave portions with a directed self-assembly material, and activating a directed self-assembly process, so that the directed self-assembly material is diffused to the perimeter of the concave portions to form a hole surrounding by the directed self-assembly material in each concave portions.

Method for forming a pattern

A hard mask spacer structure includes a first spacer on a device layer, the first spacer defining a plurality of hole patterns and at least an asteriated hole pattern between the hole patterns; and a second spacer on the first spacer and inlaid into the asteriated hole pattern, thereby rounding the asteriated hole pattern.

Hard mask spacer structure and fabrication method thereof

A method of improving lithography resolution on a semiconductor, including the steps of providing a substrate on which a protecting layer, a first etching layer and a photoresist layer are sequentially formed; patterning the photoresist layer to form an opening so as to partially reveal the first etching layer; implanting a first ion into the revealed first etching layer to form a first doped area; and implanting a second ion into the revealed first etching layer to form a second doped area, wherein the first doped area is independent from the second doped area is provided.

Lithography resolution improving method

A lithography apparatus with an optical fiber module includes: a light source, a photo mask positioned under the light source, a lens positioned under the photo mask, a wafer stage positioned under the lens for supporting the wafer, wherein the wafer includes a dry film. The lithography apparatus further includes an optical fiber module having a front surface facing away from the lens, wherein a gap is between the front surface and the dry film and the gap is smaller than the wavelength of the light source. The DUV (deep ultraviolet) can pass through the optical fiber module. The present invention features a gap smaller than the wavelength of the light source, creating a near-field effect with improved resolution.

Lithography apparatus with an optical fiber module

A patterning method has a mask layer and undoped patterns sequentially formed on a target layer. A doping process is performed to surfaces of the undoped patterns to form doped patterns from the surfaces of the undoped patterns. A material is filled in the gaps between the doped patterns. A portion of the doped patterns are then removed to expose the top surfaces of the remaining undoped patterns. The material and the exposed undoped patterns are removed. A portion of the mask layer is removed using the remaining doped patterns as a mask to form a first pattern on the mask layer. A portion of the target layer is removed using the mask layer having the first pattern thereon as a mask so as to form on the target layer a second pattern complementary to the first pattern.

Patterning method

A phase-shift mask for forming a pattern includes a glass substrate and a pattern, a first phase-shift region, a second phase-shift region and a third phase-shift region on the glass substrate. The first phase-shift region and the second phase-shift region are alternately arranged and the third phase-shift regions are formed at the terminal ends of the first phase-shift region.

Phase-shift mask and method for forming a pattern

A patterning method in a semiconductor manufacturing process includes the following steps. A base is provided. A target layer and a lining layer are sequentially formed on the surface of the base. The lining layer is patterned to form a plurality of rectangular blocks. A sidewall spacer material layer is formed on the rectangular blocks and the target layer. Part of the sidewall spacer material layer is removed to form a sidewall spacer on the side wall of each of the plurality of rectangular blocks. The plurality of rectangular blocks is removed, and the sidewall spacer is used as a hard sheltering mask to etch and remove part of the target layer. The overlay accuracy is improved and the dimension of the electronic elements can be reduced so that a lot of two-dimension structures can be manufactured on the wafer substrate.

Growing community of inventors

Taipei County, Taiwan

Ya-Chih Wang