Freescale Semiconductor,inc.

Nxp Usa, Inc.

Xuesong Xu

Jinzhong Yao

Zhigang Bai

Xingshou Pang

Lan Chu Tan

Wai Yew Lo

Nan Xu

Jun Li

Shunan Qiu

Beiyue Yan

Meng Kong Lye

You Ge

Meijiang Song

Jianhong Wang

Guoliang Gong

Wanming Yu

Mingchuan Han

Jian Song

Yinghui Li

An integrated circuit package is formed by positioning an integrated circuit die on a die pad of a leadframe; connecting a bond wire between the die and a bond pad of the leadframe; encapsulating the bond wire, die, and bond pad with an encapsulant material to form a first mold cap of the integrated circuit package; after the encapsulating, bending one or more leads of the leadframe to form one or more bent leads; and encapsulating the first mold cap and a portion of a bend of the one or more bent leads with the encapsulant material to form a second mold cap.

Integrated circuit package and method to manufacture the integrated circuit package to reduce bond wire defects in the integrated circuit package

A lead frame for a packaged integrated circuit (IC) device has a die receiving area and leads that extend outwardly from the die receiving area. The leads have an inner lead area proximate the die receiving area and an outer lead area distant from the die receiving area. Notches are formed in a surface of alternate ones of the leads, in the inner lead area proximate to the outer lead area. The notches facilitate bending of the alternate leads when the leads are subjected to a downward force by a mold tool, such that one set of leads lies in a first plane and another set lies in a second plane spaced from the first plane. The leads in the first plane can be formed into Gull Wing leads and the other set of leads into J-leads.

Lead frame with bendable leads

A method for assembling a packaged semiconductor device includes mounting a pressure-sensing die onto a die paddle of a metal lead frame. A pressure-sensitive gel is dispensed into a recess of a lid, and the lead frame is mated with the lid such that the pressure-sensing die is immersed in the pressure-sensitive gel within the recess of the lid.

Packaged semiconductor sensor device with lid

A method of packaging a pressure sensor die includes providing a lead frame having a die pad and lead fingers that surround the die pad. A tape is attached to a first side of the lead frame. A pressure sensor die is attached to the die pad on a second side of the lead frame and bond pads of the die are connected to the lead fingers. An encapsulant is dispensed onto the second side of the lead frame and covers the lead fingers and the electrical connections thereto. A gel is dispensed onto a top surface of the die and covers the die bond pads and the electrical connections thereto. A lid is attached to the lead frame and covers the die and the gel, and sides of the lid penetrate the encapsulant.

Pressure sensor and method of packaging same

A method of packaging a power semiconductor die includes providing a first lead frame of a dual gauge lead frame. The first lead frame includes a thick die pad. A tape is attached to a first side of the thick die pad and the power die is attached to a second side of the thick die pad. A second lead frame of the dual gauge lead frame is provided. The second lead frame has thin lead fingers. One end of the lead fingers is attached to an active surface of the power die such that the lead fingers are electrically connected to bonding pads of the power die. A molding compound is then dispensed onto a top surface of the dual gauge lead frame such that the molding compound covers the power die and the lead fingers.

Power device and method of packaging same

A semiconductor package and method of assembling a semiconductor package includes encapsulating a first pre-packaged semiconductor die stacked on top of and interconnected with a second semiconductor die. The first packaged semiconductor die is positioned and fixed relative to a lead frame with a temporary carrier such as tape. The second semiconductor die is attached and interconnected directly to the first packaged semiconductor die and lead frame. The interconnected first packaged die and second semiconductor die, and lead frame are encapsulated to form the semiconductor package. Different types of semiconductor packages such as quad flat no-lead (QFN) and ball grid array (BGA) may be formed, which provide increased input/output (I/O) count and functionality.

Stacked die semiconductor package

A process for assembling a semiconductor device includes providing a lead frame having a native plane and a plurality of leads having a native lead pitch. The process includes trimming and forming a first subset of the plurality of leads to provide a first row of leads. The process includes trimming and forming a second subset of the plurality of leads to provide a second row of leads. At least one subset of leads is formed with an obtuse angle relative to the native plane such that lead pitch associated with the first or second subset of leads is greater than the native lead pitch.

Semiconductor device with staggered leads

A lead frame for a semiconductor device has a die pad with a first major surface for receiving an semiconductor die and a connection bar that encircles the die pad. First lead fingers that project from the connection bar towards the die pad have proximal ends close to the die pad and distal ends connected to the connection bar. The proximal ends of the first lead fingers lie in a first plane. Second lead fingers that project from the connection bar towards the die pad have proximal ends close to the die pad and distal ends connected to the connection bar. The proximal ends of the second lead fingers lie in a second plane that is parallel and spaced from the first plane. An isolation frame is disposed between the proximal ends of the first and second lead fingers. The isolation frame separates but supports the proximal ends of the first and second lead fingers.

Lead frame for semiconductor device

A method of assembling a magnetoresistive random access memory (MRAM) device includes providing a substrate having an opening. A tape is applied to a surface of the substrate and a first magnetic shield is placed onto the tape and within the substrate opening. An adhesive is applied between the first magnetic shield and the substrate to attach the first magnetic shield to the substrate. An MRAM die is attached to the first magnetic shield and bond pads of the MRAM die are connected to pads on the substrate with wires. A second magnetic shield is attached to a top surface of the MRAM die. An encapsulating material is dispensed onto the substrate, the MRAM die, the second magnetic shield and part of the first magnetic shield, cured, and then the tape is removed. Solder balls then may be attached to the substrate.

MRAM device and method of assembling same

A lead frame has multiple regions having different wetting characteristics on its surface. For example, one region is formed to handle silver plating while another has less wetting ability. A boundary between the regions causes a wetting force difference that inhibits molten solder flow between regions during solder die bonding.

Lead frame with solder flow control

In a method of packaging a semiconductor IC, a tape is attached to a back surface of a lead frame array, and the lead frame array is held between an upper mold chase and a lower mold chase of a mold, with the back surface of the lead frame array upward. The upper and lower mold chases form an upper cavity and a lower cavity with respect to the lead frame array respectively. A mold compound is injected into the upper and lower cavities respectively. With respect to clearances between leads, between die pads and/or between the leads and the die pads, the mold compound injected into the upper cavity covers the portion of the tape over the clearances before the mold compound injected into the lower cavity fills the clearances, so that the tape is depressed. After curing the mold compound, removing the mold and de-taping, the mold compound filled in the clearances is recessed inward from the back surface, which increases the solderability in the subsequent surface mount process and decreases the possibility of the occurrence of lead short-circuits.

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Tianjin, China

Xuesong Xu