Texas Instruments Corporation

Intersil Americas Inc.

Dongguan Changgong Microelectronics Ltd

Xuening Li

Stefan Wlodzimierz Wiktor

Thomas Andrew Jochum

William Todd Harrison

Michael M Walters

Tetsuo Tateishi

Wenkai Wu

Weidong Zhu

Hal Chen

Vladimir Alexander Muratov

Wei Dong

Larry J Wofford

Lin Sheng

Guanghua Ye

Zhiming Hu

This present invention comprises the multiple power sections and a multi-input operational amplifier, wherein the pilot device places at the different location of the main power MOSFET form multiple individual power section, the multi-input operational amplifier drives a transistor to detect the overall current of each power section furthermore report the overall current to system.

Multi-section current sense method for monolithic power system

DC-DC converter PWM controllers and dual counter digital integrators are presented for integrating an error between a reference voltage signal and a feedback voltage signal, in which a comparator, dual counters, and a DAC are used to provide a compensated reference to a modulator loop comparator which generates a PWM switching signal for controlling a power converter output voltage, with the second counter being selectively incremented or decremented when the first counter output indicates a predetermined value after the first counter output transitions in one direction through a predetermined count range to enhance loop stability, and a startup mode control allows fast integrator operation during initialization, with the ability to freeze integrator operation during overcurrent conditions.

DC-DC converter controller apparatus with dual-counter digital integrator

DC to DC converters and pulse width modulation controllers are presented with compensation circuitry to mitigate discontinuous conduction mode (DCM) undershoot and continuous conduction mode offsets in inductor current emulation information by providing compensation signals proportional to the output voltage and the converter off time (Toff) when the low side converter switch is actuated.

Emulation based ripple cancellation for a DC-DC converter

Systems and devices for smooth light load operation in a DC/DC converter are presented. The disclosed systems and methods enable smooth discontinuous conduction mode (DCM)/continuous conduction mode (CCM) transition. The disclosed systems and methods of smooth light load operation in a DC/DC converter may also avoid the generation of sub-harmonics during light load operation. In an example embodiment, a rising ramp is used to control the ON time of the converter oscillator, while a falling ramp controls the OFF time. During DCM operation, the minimum value of the falling ramp is clamped. The clamping of the falling ramp ensures a substantially similar level of the error amplifier output in both CCM and DCM and avoids disturbances caused by a difference in the error amplifier outputs between the modes.

Systems and methods of smooth light load operation in a DC/DC converter

Systems and devices for ripple reduction in a DC/DC converter are presented. The disclosed systems and methods enable ripple reduction in discontinuous conduction mode (DCM) operation. In DCM, the inductor current peak to peak ripple may be reduced based on the load current. To achieve the reduction of the inductor peak to peak current ripple, a digital counter is used to count the time between consecutive PWM pulses. The digital output of the counter is used to control the pulse width modulation. As the digital output of the counter increases, the PWM on-time decreases. Since the PWM pulse is demanded by the load in DCM mode, the peak to peak inductor ripple is modulated by the counter, or, in turn, modulated by the load current.

Systems and methods of ripple reduction in a DC/DC converter

One embodiment of the invention includes a power regulator system. The system includes a switching system configured to generate an output voltage across a load based on a high-side switch coupling a power voltage to an output at an edge-trigger of a PWM control signal having an activation pulse-width of the high-side switch. The system also includes a switch driver system configured to set a duty-cycle of the PWM control signal such that the activation pulse-width of the PWM control signal is based on the power regulator system operating in one of a continuous conduction mode (CCM) and a discontinuous conduction mode (DCM). The edge-trigger of the PWM control signal can occur based on a relative magnitude of the output voltage and the power voltage while operating in the DCM.

Discontinuous conduction mode pulse-width modulation

A multi-phase power system including a plurality of Pulse Width Modulation (PWM) controllers is provided, including a first PWM controller and at least one second PWM controller. The first PWM controller is configured to generate at least one first output signal based on a first clock signal, and to insert at least one synchronizing pulse into the first clock signal, the synchronizing pulse having a predetermined characteristic differing from pulses of the first clock signal, and to provide the first clock signal including the synchronizing pulse to the second PWM controller. The second PWM controller is configured to generate at least one second output signal based on the first clock signal, and to synchronize the generation of the first and second output signals using the synchronizing pulse within the first clock signal, thereby maintaining a predetermined phase relationship between the first and second output signals. The synchronizing pulse may be, for example, a skinny pulse or a pulse having a magnitude larger than the pulses of the first clock signal.

Distributing time slots in parallel configured, switching power supplies

Synchronously stackable double-edge modulated pulse width modulation generators are disclosed. An example pulse width modulation generator includes a ramp generator to generate first and second ramp signals that interact to form a virtual ramp signal; and a comparator module coupled to the ramp generator configured to produce a pulse width modulated signal based on a comparison between the virtual ramp signal and an input signal.

Synchronously stackable double-edge modulated pulse width modulation generators

An apparatus for driving a pulse width modulation reference signal includes: (a) A converting unit receiving an input signal at an input locus and presenting an output current at an output locus. The input signal varies at a first frequency. The output current is substantially related with the first frequency. (b) A capacitive element coupled with the output locus for charging by the output current. The pulse width modulation reference signal is related with voltage across the capacitive element.

Apparatus and method for driving a pulse width modulation reference signal

A method and apparatus for use in a multi-phase power system. The power system is of the type having a plurality of Pulse Width Modulation (PWM) controllers including a first PWM controller and at least one second PWM controller. The first PWM controller generates at least one first PWM output signal based on a cyclic signal having a cyclically recurring parameter, and provides the cyclic signal including the cyclically recurring parameter to the second PWM controller. The second PWM controller generates at least one second PWM output signal based on the cyclic signal, and synchronizes the generation of the first and second output signals using the cyclically recurring parameter within the cyclic signal, thereby maintaining a predetermined phase relationship between the first and second output signals. The second PWM controller generates a cyclic, triangular RAMP waveform signal having a series of periods, the RAMP waveform having in each period a signal rising portion and a signal falling portion, and compares the RAMP waveform against an error signal to generate the second PWM signal, the RAMP waveform rising portion and falling portion being generated by charging and discharging, respectively, a capacitor. A feedforward path is provided by setting a charging current for the capacitor that is proportional to an input voltage.

Double-edge, stackable PWM with built-in feedforward

A multi-module DC-DC converter provides synchronization between modules based on identification of a module within a chain. A resistor network can be used for the chain so that each module obtains a particular voltage based on its position within the chain. A master module provides a source current to drive the chain so that each module can determine its relative position in the chain based on voltage readings. With this configuration, a master module can determine how many modules are in the chain, and each slave module can determine its relative position in the chain. The module information contributes to synchronization between the modules for use in current ripple cancellation, for example, in the multi-module DC-DC converter.

System and method for distributing module phase information

A multiphase synthetic ripple voltage generator for a multiphase DC-DC regulator including a master clock circuit that generates a master clock signal, sequence logic and a ripple regulator for each phase. The DC-DC regulator includes multiple switching circuits, each responsive to a corresponding PWM signal to switch input voltages via a phase node through an output inductor to develop an output voltage. The sequence logic sets each PWM signal in sequential order based on the master clock signal. Each ripple generator includes a transconductance amplifier, a ripple capacitor and a comparator. The transconductance amplifier has an input coupled to a corresponding output inductor and an output coupled to a corresponding ripple capacitor. The comparator has a first input coupled to the ripple capacitor, a second input receiving an error voltage, and an output coupled to the sequence logic for resetting a corresponding PWM signal.

Synchronization of multiphase synthetic ripple voltage regulator

A transconductance amplifier with multi-emitter structure for balancing current of a multi-phase regulator including multiple transistors, a bias current device, multiple current mirrors, and multiple current sources. Each transistor has first and second current terminals and a current control terminal receiving a corresponding one of multiple sense voltages. Each sense voltage is indicative of output inductor current of a corresponding phase of the multi-phase regulator. The bias current device is coupled to the first current terminal of each transistor. Each current mirror has an input coupled to a second current terminal of a corresponding transistor and an output coupled to a corresponding one of multiple correction nodes. Each current source is coupled to a corresponding one of multiple correction nodes. In this manner, each correction node provides a correction current for a corresponding phase of the regulator.

Transconductance amplifier with multi-emitter structure for current balance in a multi-phase regulator

A multiphase ripple voltage regulator generator employs a hysteretic comparator referenced to upper and lower voltage thresholds. The hysteretic comparator monitors a master ripple voltage waveform developed across a capacitor supplied with a current proportional to the difference between the output voltage and either the input voltage or ground. The output of the hysteretic comparator generates a master clock signal that is sequentially coupled to PWM latches, the states of which define the durations of respective components of the synthesized ripple voltage. A respective PWM latch has a first state initiated by a selected master clock signal and terminated by an associated phase voltage comparator that monitors a respective phase node voltage.

A modified Brokaw cell-based circuit produces a current which varies linearly with temperature. The collector-emitter current flow path of a diode-connected transistor is connected in series with the PTAT current produced by a control transistor. The base of the control transistor receives a control voltage whose value defines a limited range of variation of output current with temperature. The output transistor is coupled to an input port of a current mirror, which mirrors the linear collector current from the output transistor. The current through the output transistor is controlled by a composite of a CTAT base-emitter voltage of the diode-connected transistor and a PTAT voltage across a resistor, so that the output transistor produces an output current having a linear temperature coefficient.

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Cary, NC, United States of America

Xuening Li