Boe Technology Group Co., Ltd.

Hefei Boe Joint Technology Co., Ltd.

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Boe Technology Groupco., Ltd.

Boe Technology Group Go., Ltd.

Xuehuan Feng

Yongqian Li

Can Yuan

Zhidong Yuan

Meng Li

Pan Xu

Xing Zhang

Zhenfei Cai

Dacheng Zhang

Zhongyuan Wu

Sixiang Wu

Hao Liu

Xuelian Cheng

Song Meng

Lang Liu

Qi Hu

Zehua Ding

Guoying Wang

Xing Yao

Yicheng Lin

Ying Han

Quanhu Li

Zhan Gao

Mingi Chu

Yubao Kong

Wei Li

Lin Sun

Ming Wang

Wei Chen

Chen Hui Xu

Zheng Liu

Min He

Fei Fei Li

Jingquan Wang

Jingbo Xu

Wenchao Bao

Huihui Li

Xiaolong Wei

Dongxu Han

Mengyu Luan

Haixia Xu

Youyuan Hu

Xinzhu Wang

Jianye Zhang

Xinfeng Wu

Liu Wu

Bo Mao

Chen Xu

Chao Jiao

Taejin Kim

Mingming Xie

A pixel circuit, a pixel unit and a method for driving a pixel circuit. The pixel circuit includes: a driving circuit (), a writing circuit, a light-emitting control circuit, a first compensation circuit, and a second compensation circuit. The first compensation circuit is configured to electrically couple or decouple a control terminal of the driving circuit to/from a first terminal of the driving circuit according to a signal of a second control signal terminal of the pixel circuit. The second compensation circuit is configured to provide a voltage of a first voltage terminal of the pixel circuit to an output signal terminal of the pixel circuit under control of a third control signal terminal of the pixel circuit, and to electrically couple or decouple the output signal terminal to/from the control terminal of the driving circuit, according to a signal of a fourth control signal terminal of the pixel circuit.

Pixel circuit, pixel unit, and driving method

Disclosed is a shift register () including a first input sub-circuit (), configured to receive a first input signal from a first input terminal and output a blanking output control signal to a first node (Q) in a blanking period of time of a frame; a second input sub-circuit (), configured to receive a second input signal from a second input terminal and output a display output control signal to the first node (Q) in a display period of time of the frame; an output sub-circuit (), configured to output a composite output signal via an output terminal (OUT) under control of the first node (Q), the composite output signal including a display output signal outputted in a display period of time and a blanking output signal outputted in a blanking period of time which are independent of each other.

Shift register, gate driving circuit, display apparatus and driving method

A shift-register unit includes a first circuit including a first input circuit coupled via a first node to a first output circuit, and a second circuit including a second input circuit coupled via a second node to a second output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal. The first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. The second input circuit is configured to control a voltage level of the second node in response to the first input signal. The second output circuit is configured to output a second output signal in response to the voltage level of the second node. The first input circuit includes a fifth transistor.

Shift-register unit, gate-driving circuit, display apparatus, and driving method

Disclosed is a shift register, a gate driving circuit, a display apparatus and a driving method, the shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output an output blanking output control signal; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal; a selection sub-circuit, having a first terminal connected to the second input sub-circuit, a second terminal connected to the first input sub-circuit, and a third terminal connected to a first node, configured to control a potential of the first node according to the display output control signal and the blanking output control signal; an output sub-circuit, configured to output a composite output signal via an output terminal under control of a first node.

A method of repairing a gate-on-array circuit is provided. The method includes at least one of disconnecting a X-th stage gate driving signal output terminal from a X-th stage gate driving signal output line; disconnecting a X-th stage compensation control signal output terminal from a X-th stage compensation control signal output line; or disconnecting a X-th stage carry signal output terminal from a X-th stage carry signal output line. The method further includes at least one of connecting the X-th stage gate driving signal output line to a repair gate driving signal output terminal through a gate driving signal output repair line; connecting the X-th stage compensation control signal output line to a repair compensation control signal output terminal through a compensation control signal output repair line; or connecting the X-th stage carry signal output line to a repair carry signal output terminal through a carry signal output repair fine.

Method of repairing gate-on-array circuit, gate-on-array circuit, and display apparatus

Provided is a display device. The display device includes: a display panel and a control assembly; wherein the display panel includes a base substrate, a plurality of first color light-emitting units, and a sensing unit, wherein the sensing unit is electrically connected to the plurality of first color light-emitting units to acquire a plurality of sensing values; the control assembly is electrically connected to the sensing unit, and configured to acquire a plurality of rearranged sensing values by rearranging the plurality of sensing values; and the control assembly is further configured to adjust the plurality of first color light-emitting units in the display panel based on the plurality of rearranged sensing values.

Display device, method and device for adjusting same, and computer storage medium

A display substrate and a display device are provided. The display substrate includes a base substrate, and a gate driving circuit and a plurality of signal lines arranged on the base substrate; the plurality of signal lines include a first clock sub-signal line and a second clock sub-signal line; an orthographic projection of the first clock sub-signal line on the base substrate and an orthographic projection of the second clock sub-signal line on the base substrate are arranged side by side, and the first clock sub-signal provided by the first clock sub-signal line is the same as the second clock sub-signal provided by the second clock sub-signal line.

Display substrate and display device

Provided are a display panel, a driving method therefor and a display device. The display panel includes pixel driving circuits and a first gate driving circuit. The pixel driving circuit includes a driving circuit connected to first to third nodes for inputting a driving current to the third node through the second node, and a first switching unit having a first terminal connected to the third node and a second terminal connected to a sensing signal terminal for electrically connecting, in response to a signal at a control terminal thereof, the third node and sensing signal terminal. The first gate driving circuit includes a first output terminal corresponding to the pixel driving circuit and connected to the control terminal. The first output terminal outputs an active level pulse during data writing stage and black frame insertion stage of a driving cycle of the pixel driving circuit corresponding thereto.

Display panel, driving method therefor, and display device

An array substrate and a display device are provided. The array substrate includes a base substrate, and gate lines, a gate driving structure, an interconnecting structure and an insulating layer. The gate lines are electrically connected with the gate driving structure through the interconnecting structure; the insulating layer is located between the gate lines and the interconnecting structure, and includes a first via hole and a second via hole. The gate line includes a first connecting portion and a second connecting portion, and the second connecting portion is located between the gate driving structure and the first connecting portion; the first connecting portion is electrically connected with the interconnecting structure through the first via hole, and a straight line extending in a direction perpendicular to the base substrate passes through the second connecting portion, the second via hole and the interconnecting structure in turn.

Array substrate and display device

A shift register is provided and includes a display input reset circuit, an inverter circuit, at least one output circuit and a first detection circuit; the display input reset circuit, the inverter circuit and the output circuit are connected to a pull-up node; the inverter circuit and the at least one output circuit are connected to a pull-down node; the first detection circuit is connected to a signal acquisition point, an acquisition control terminal, and a first signal detection line, and configured to acquire a voltage at the signal acquisition point in response to a signal from the acquisition control terminal and output a detection voltage corresponding to the acquired voltage to the first signal detection line, an external first chip adjusts an active level voltage from the third power supply terminal according to the detection voltage; the signal acquisition point includes the pull-down node and/or a signal output terminal.

Shift register, gate driving circuit, and display apparatus

A method for compensating display brightness, a circuit for compensating display brightness, and a display device are provided. The method for compensating display brightness is applicable to a display device. A first group of sub-pixel rows in the display device perform normal display and black frame insertion display in a same frame display period. A second group of sub-pixel rows in the display device perform normal display in a current frame display period and an adjacent next frame display period, and perform black insertion display in the adjacent next frame display period. A first interval period is provided between the current frame display period and the adjacent next frame display period. The method for compensating includes: compensating luminous brightness of the first group of sub-pixel rows and/or compensating luminous brightness of the second group of sub-pixel rows.

Method for compensating display brightness, circuit for compensating display brightness, and display device

A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes an input circuit, a first control circuit, a blanking control circuit, a first output circuit, and a second output circuit. The input circuit is configured to control a level of a first node; the first control circuit is configured to control a level of the second node; the blanking control circuit is configured to control the level of the first node and the level of the second node; the first output circuit is configured to output a first output signal at the first output terminal; and the second output circuit is configured to output a second output signal at the second output terminal under control of the level of the second node.

Shift register unit, driving method, gate driving circuit, and display device

The present disclosure provides a shift register unit, including: a first sensing control input circuit and at least one first output circuit; the shift register unit further includes: a first voltage control circuit, a first sensing input leakage prevention circuit and a first current limiting circuit; the first sensing control input circuit is connected to a first pull-up node through the first sensing input leakage prevention circuit, the first sensing control input circuit is connected to the first sensing input leakage prevention circuit at a first sensing input leakage prevention node connected to a first voltage control node, the first sensing input leakage prevention circuit is connected to the clock control signal input terminal and is configured to control on/off between the first sensing input leakage prevention node and the first pull-up node; the first current limiting circuit is connected to the first voltage control node.

Shift register unit, gate driving circuit and display substrate

A shift register unit, a driving method thereof, and a gate driving circuit are disclosed. The shift register unit includes: an input circuit configured to receive an input signal from an input signal terminal and output the input signal to a voltage stabilizer node; a voltage-stabilizing circuit configured to input potential of the voltage stabilizer node to a pull-up node and control potential of the voltage stabilizer node; an output circuit configured to receive a clock signal from a clock signal terminal and provide an output signal to an output signal terminal based on the clock signal received under control of the potential of the pull-up node; and a control circuit configured to control potential of the output signal terminal under control of the potential of the pull-up node.

Shift register unit, driving method thereof, and gate driving circuit

A pixel circuit includes: a driving sub-circuit, a sensing sub-circuit, a light-emitting control sub-circuit, a sensing control sub-circuit, a light-emitting device and a sensing terminal. The driving sub-circuit includes a first terminal and a second terminal coupled to the light-emitting device, and is configured to write a data signal into the driving sub-circuit in response to a first scan signal and control an electrical signal flowing through the driving sub-circuit according to the data signal. The sensing sub-circuit is configured to connect the second terminal to the sensing terminal in response to a second scan signal. The light-emitting control sub-circuit is configured to connect a first voltage terminal to the first terminal in response to a light-emitting control signal. The sensing control sub-circuit is configured to connect a second voltage terminal to the first terminal in response to a sensing control signal provided by a sensing control terminal.

Pixel circuit, driving method of pixel circuit and display apparatus

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Beijing, China

Xuehuan Feng