Dialog Semiconductor Gmbh

Iwatt Inc.

Exar Corporation

Xuecheng Jin

John William Kesterson

Enzhu Liang

Xiaoyan Wang

Ping Lo

Minjong Kim

Yang Li

Ion E Opris

Kent Kernahan

Sorin Andrei Spanoche

Selcuk Sen

Yu Cheng Chang

Maofeng Lan

Chenghung Pan

Andrey B Malinin

Jiang Chen

Carrie Seim

Gyan Tiwary

Selective dimming in a light emitting display device to reduce power consumption. The display device includes a display panel that includes a plurality of light emitting pixels. An image processor is configured to divide an image frame into a plurality of regions and to reduce pixel intensity levels in at least one region of the plurality of regions to generate an adjusted image frame. The at least one region corresponds to a background of the image frame. A display driver converts data for the adjusted image frame into control signals for controlling brightness of the light emitting pixels. The display device may be, for example, an organic light emitting diode (OLED) display device or other type of display device that includes light emitting pixels.

Selective dimming to reduce power of a light emitting display device

An adaptive switch mode LED driver provides an intelligent approach to driving multiple strings of LEDs. The LED driver determines an optimal current level for each LED channel from a limited set of allowed currents. The LDO driver then determines a PWM duty cycle for driving the LEDs in each LED channel to provide precise brightness control over the LED channels. Beneficially, the LED driver minimizes the power dissipation in the LDO circuits driving each LED string, while also ensuring that the currents in each LED string are maintained within a limited range. A sample and hold LDO allows PWM control over extreme duty cycles with very fast dynamic response. Furthermore, fault protection circuitry ensures fault-free startup and operation of the LED driver.

Adaptive switch mode LED driver

A Predictive Power Control (PPC) device within a TCON Bias IC that addresses an overdesign inefficiency and enables a low cost solution. A PPC block utilizes the next frame image data and interacts with a pulse width modulation (PWM) control block of internal regulators to proactively prepare the output voltages of a power regulator for the power requirements in one or more future frames, for example.

Predictive power control in a flat panel display

An LED driver controls current through an LED string. The LED driver generates a boosted PWM signal to drive a PWM transistor in the LED current path such that the PWM transistor maintains a substantially constant V, thus minimizing turn-on impedance of the PWM transistor. A current mirror circuit controls peak LED current when the PWM transistor is on. A trimming circuit includes a set of programmable switches to couple or decouple trimming transistor from the LED current path, and allowing for fine calibration of the LED current. By maintaining a low resistance and compensating for current mismatch in the LED current path, the LED driver provides efficient power performance and robustness that is particularly beneficial in high current applications.

High performance adaptive switched LED driver

A system controls a switching power converter to power LED strings using a predictive feedforward control mechanism. An LED controller determines programmed current levels and duty cycles for driving LED strings. The LED controller determines a predicted load for a subsequent cycle of a switching power converter driving the LED strings based on the programmed current levels and duty cycles. A power conversion controller uses the predicted load information to control switching of the switching power converter. This improves the dynamic response of the switching converter to changing load conditions, thereby improving overall power efficiency and performance of the system.

Predictive control of power converter for LED driver

A system that provides an intelligent approach to driving multiple strings of LEDs. A processing device determines an optimal current level for each LED string from a limited set of allowed currents. The processing device also determines a PWM duty cycle for driving the LEDs in each LED string to provide precise brightness control over the LED string. The settings for the current level and duty cycle are transmitted to an LED driver for regulating the current and on-off times of the LED strings. Beneficially, the system reduces the size of the LED driver while leveraging existing resources available in the processing device to operate the LEDs in a power efficient manner.

Adaptive switch mode LED system

A start-up circuit in a switch-mode power converter that employs a Zener diode to provide a reference voltage to reduce the power consumption and the size of the start-up circuit. The start-up circuit also includes a coarse current source and a coarse reference voltage signal generator for producing current and reference voltage for initial startup operation of a bandgap circuit. The reference signal and current from coarse current source and the reference voltage signal generator are subject to large process, voltage and temperature (PVT) variations or susceptible to noise from the power supply, and hence, these signals are used temporarily during start-up and replaced with signals from higher performance components. After bandgap circuit becomes operational, the start-up receives voltage reference signal from the bandgap circuit to more accurately detect undervoltage lockout conditions.

Low power consumption start-up circuit with dynamic switching

A digital phase lock loop circuit provides an output with reduced jitter. The digital phase lock loop circuit includes a phase frequency detector that determines a phase difference between a feedback signal and a reference frequency signal to generate an error signal indicative of the phase difference. A numerically controlled oscillator generates a first oscillator output signal with a frequency proportional to the error signal and a second oscillator output signal indicative of jitter of the first oscillator output signal in reference to the reference frequency signal. A phase accuracy extender determines a delay amount from the second oscillator output signal and delays the first oscillator output signal by the delay amount to generate a phase-enhanced output signal with edges aligned with one of a plurality of reference clock signals.

Digital phase lock loop with multi-phase master clock

A method and system of system-on-chip design that provides the benefits of reduced design time, a smaller die size, lower power consumption, and reduced costs in chip design and production. The process seeks to remove the worst performance and worst power case scenarios from the design and application phases. This is accomplished by planning the power supply voltage in the design phase along with its tolerance with process corner and temperature combinations. The established plan is then applied with communications between power supply integrated circuits and load system-on-chip.

Method and apparatus for small die low power system-on-chip design with intelligent power supply chip

Methods are disclosed for performing analog to digital signal conversion in shorter time and/or with less power consumption. A predictive guess is supplied as a digital first signal. The digital first signal is converted (D/A) to a counterpart, analog guess signal. A comparison is made between the analog guess signal and a received, analog input sample signal. The result of the comparison is used to improve on the initially supplied guess in a next cycle. Fewer cycles and less power is consumed if the initial guess is within a certain range of the actual magnitude of the analog input sample signal.

Methods of using predictive analog to digital converters

A voltage-to-current converter providing an output current with compensation for process-voltage-temperature (PVT) variations of a component in the voltage-to-current converter. The voltage-to-current converter includes a first voltage-to-current converter branch, a second voltage-to-current converter branch, and a compensation current path. The first voltage-to-current converter provides a first current to the output of the voltage-to-current converter based on a variable control voltage. The second voltage-to-current converter branch provides a second current based on a fixed voltage. The compensation current path provides a compensation current from the second voltage-to-current branch to the first voltage-to-current converter branch compensating variations in the first current caused by the PVT variations of the component in the first voltage-to-current converter branch.

Compensation of voltage-to-current converter

Methods and devices perform analog to digital signal conversion in shorter time and/or with less power consumption than that of a comparable analog to digital conversion that uses a conventional sequential approximation method based on a binary search. A predictive guess is supplied as a digital first signal. The digital first signal is converted (D/A) to a counterpart, analog guess signal. Fewer cycles and less power is consumed if the initial guess is within a certain range of the actual magnitude of the analog input sample signal. In one embodiment, a digital modeler is used to model a process underlying the analog input sample signal to thereby provide fairly good guesses.

Predictive analog to digital converters and methods of using

A reference buffer includes a first current mirror, a second current mirror, a first source follower coupled in series to a branch of the first current mirror and receiving a first initial reference voltage and outputting a first reference voltage, a second source follower coupled in series to a branch of the second current mirror and receiving a second initial reference voltage and outputting a second reference voltage, and a resistor coupled between a first node and a second node outputting the first and second reference voltages, respectively. The first node is disposed between the first current mirror and the first source follower and the second node is disposed between the second current mirror and the second source follower. The voltage difference between the first reference voltage and the first initial reference voltage is substantially same as that between the second reference voltage and the second initial reference voltage.

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Palo Alto, CA, United States of America

Xuecheng Jin