Applied Materials, Inc.

Georgia Tech Research Corporation

Xuebin Li

Schubert S Chu

Abhishek Dube

Yi-Chiau Huang

Zhiyuan Ye

Hua Chung

Patricia M Liu

Yihwan Kim

Saurabh Chopra

Errol Antonio C Sanchez

Paul Brillhart

Gaurav Thareja

Nyi O Myo

Balasubramanian Ramachandran

Zhepeng Cong

Kartik Bhupendra Shah

Anzhong Chang

Kin Pong Lo

Edric Tong

Zuoming Zhu

Kevin Joseph Bautista

James Francis Mack

Flora Fong-Song Chang

Anhthu Ngo

Wei Liu

Shashank Sharma

Xinyu Bao

Sanjay S Natarajan

Masato Ishii

Andy Lo

Jenn-Yue Wang

Sathya Chary

Mehmet Tugrul Samir

Shu-Kwan Danny Lau

Raymond Hoiman Hung

Joe Margetis

Ali Zojaji

Tushar Mandrekar

Sheng-Chin Kung

Walt A De Heer

Chen-Ying Wu

Michael Sprinkle

Yuxiang Lu

John S Webb

Embodiments of the present invention generally relate to methods of epitaxially growing boron-containing structures. In an embodiment, a method of depositing a structure comprising boron and a Group IV element on a substrate is provided. The method includes heating the substrate at a temperature of about 300° C. or more within a chamber, the substrate having a dielectric material and a single crystal formed thereon. The method further includes flowing a first process gas and a second process gas into the chamber, wherein: the first process gas comprises at least one boron-containing gas comprising a haloborane; and the second process gas comprises at least one Group IV element-containing gas. The method further includes exposing the substrate to the first and second process gases to epitaxially and selectively deposit the structure comprising boron and the Group IV element on the single crystal.

Epitaxial methods including a haloborane formula for growing boron-containing structures having increased boron concentrations

In one embodiment, a susceptor for thermal processing is provided. The susceptor includes an outer rim surrounding and coupled to an inner dish, the outer rim having an inner edge and an outer edge. The susceptor further includes one or more structures for reducing a contacting surface area between a substrate and the susceptor when the substrate is supported by the susceptor. At least one of the one or more structures is coupled to the inner dish proximate the inner edge of the outer rim.

Thermal processing susceptor

Embodiments of the present disclosure generally relate to methods for forming epitaxial layers on a semiconductor device. In one or more embodiments, methods include removing oxides from a substrate surface during a cleaning process, flowing a processing reagent containing a silicon source and exposing the substrate to the processing reagent during an epitaxy process, and stopping the flow of the processing reagent. The method also includes flowing a purging gas and pumping residues from the processing system, stopping the flow of the purge gas, flowing an etching gas and exposing the substrate to the etching gas. The etching gas contains hydrogen chloride and at least one germanium and/or chlorine compound. The method further includes stopping the flow of the at least one compound while continuing the flow of the hydrogen chloride and exposing the substrate to the hydrogen chloride and stopping the flow of the hydrogen chloride.

Method and apparatus for low temperature selective epitaxy in a deep trench

Embodiments described herein relate to a method of epitaxial deposition of p-channel metal oxide semiconductor (MMOS) source/drain regions within horizontal gate all around (hGAA) device structures. Combinations of precursors are described herein, which grow of the source/drain regions on predominantly <100> surfaces with reduced or negligible growth on <110> surfaces. Therefore, growth of the source/drain regions is predominantly located on the top surface of a substrate instead of the alternating layers of the hGAA structure. The precursor combinations include a silicon containing precursor, a germanium containing precursor, and a boron containing precursor. At least one of the precursors further includes chlorine.

Anisotropic sige:b epitaxial film growth for gate all around transistor

A method and apparatus for the formation of a metal-oxide semiconductor FET (MOSFET) device is disclosed herein. The method of formation includes the utilization of a silicon-germanium seed layer deposited over an n-channel metal-oxide semiconductor (NMOS) device and a p-channel metal-oxide semiconductor (PMOS) device. The seed layer may be one seed layer deposited over both the NMOS source/drain regions and the PMOS source/drain regions or two doped seed layers wherein a first doped seed layer is deposited over the PMOS source/drain regions and a second doped seed layer is deposited over the NMOS source/drain regions. The seed layer enables simultaneous formation of a silicide over both the PMOS source/drain regions and the NMOS source/drain regions. The silicide formation consumes the seed layer and forms a silicide layer which varies in composition depending upon the composition of the absorbed seed layer.

Method of simultaneous silicidation on source and drain of NMOS and PMOS transistors

Embodiments disclosed herein are directed to forming MOSFET devices. In particular, one or more pre-silicide treatments are performed on a substrate prior to the deposition of the metal-silicide layer to improve the density and performance of the metal-silicide layer in the MOSFETs. The metal-silicide formation formed with the pre-silicide treatment(s) can occur before or after the formation of metal gates during MOSFET fabrication.

Silicide film nucleation

Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.

Methods and apparatus for metal silicide deposition

Implementations of the present disclosure generally relate to methods for forming a transistor. More specifically, implementations described herein generally relate to methods for forming a source/drain contact. In one implementation, the method includes forming a trench in a dielectric material to expose a source/drain region of a transistor, performing a pre-clean process on the exposed source/drain region, forming a doped semiconductor layer on the source/drain region by an epitaxial deposition process, and fill the trench with a conductor. The doped semiconductor layer has a lower electrical resistance than the source/drain region due to a higher dopant concentration in the doped semiconductor layer. As a result, the contact resistance of the source/drain contact is reduced.

Method of fabricating a semiconductor device having reduced contact resistance

The present disclosure generally relates to methods for forming a semiconductor device, a semiconductor device, and a processing chamber. The method includes forming a source/drain region in a processing system, forming a doped semiconductor layer on the source/drain region in the processing system, forming a metal silicide layer, forming a dielectric material, forming a trench in the dielectric material, and filling the trench with a conductor. The source/drain region, the doped semiconductor layer, and the metal silicide layer are formed without breaking vacuum. A semiconductor device includes a plurality of layers, and the semiconductor device has reduced contact resistance. A processing system is configured to perform the method and form the semiconductor device. Embodiments of the present disclosure enable formation of a source/drain contact with reduced contact resistance by using integrated processes, which allows various operations of the source/drain contact formation to be performed within the same processing system.

Semiconductor device, method of making a semiconductor device, and processing system

The systems and methods discussed herein are for a cluster tool that can be used for MOSFET device fabrication, including NMOS and PMOS devices. The cluster tool includes process chambers for pre-cleaning, metal-silicide or metal-germanide film formation, and surface protection operations such as capping and nitridation. The cluster tool can include one or more process chambers configured to form a source and a drain. The devices fabricated in the cluster tool are fabricated to have at least one protective layer formed over the metal-silicide or metal-germanide film to protect the film from contamination during handling and transfer to separate systems.

In-situ integrated chambers

Methods for depositing a metal silicide are provide and include heating a substrate having a silicon-containing surface to a deposition temperature, and exposing the substrate to a deposition gas to deposit a silicide film on the silicon-containing surface during a chemical vapor deposition process. The deposition gas contains a silicon precursor, a titanium or other metal precursor, and a phosphorus or other non-metal precursor.

Methods for silicide deposition

Growing community of inventors

Sunnyvale, CA, United States of America

Xuebin Li