Inventec Corp.

Xue-Ning Ren

Yu-Chuan Chang

Tong S Chen

Kuang Shin Lin

The present invention relates to a method and an universal module for testing functions of communication ports of a computer, including both parallel port and serial port. The module includes a logic control unit and connects to a communication port (a serial or a parallel port) for testing the open or short conditions of the ports through walk 1' and a walk 0&#x2032; logic tests. The testing module not only can check the open condition of a parallel port, but also can check the open and short conditions of a parallel port and a serial port.

Method and module for universal test of communication ports

The present invention relates to an apparatus and method for testing the WAIT signal line of a communication interface socket to detect whether the WAIT signal line of the socket, such as a PCMCIA socket, can work properly. The present invention utilizes an electrical switch and several status signal lines, such as IOWR and IN signal lines, to identify the status of the WAIT signal line and detect whether the WAIT signal line works properly according to the status signal lines being in a HIGH state or a LOW state.

Apparatus and method for testing the wait signal line of a communication interface socket

A method for testing n data pins of a parallel communication port. It includes the main steps of: (a) selecting an address to access a memory unit; (b) selecting a data pin to be tested and a testing data, wherein the testing data is a binary code consisting of (n&mdash;1) of first binary digits at data pins other than the data pin being selected and a second binary digit at the data pin being selected, the first binary digit being different from the second binary digit; (c) writing the testing data into the memory unit through all the data pins; (d) reading a stored data from the memory unit also through all the data pins; and (e) comparing the testing data with the stored data to diagnose the data pins, then storing the result into computer memory. The step of diagnose the data pins comprises the sub-steps of: (i) checking to see whether the binary digit of the stored data at the selected data pin is the same as the binary digit of testing data, if no, the selected data pin is open, if not, proceeding to step (ii); and (ii) checking to see whether there exists another data pin at whose location the binary digit is the same as the binary digit of the selected data pin, if yes, then there is a short circuit between the selected data pin and that data pin.

Method for testing data pins of a parallel communication port

The present invention provides a method and apparatus for testing the communication performance of the pins of a serial port. It reads the states of several group of pins to check the existence of the port and the correctness of communication address. Moreover, it checks the working condition of the pins with interruption signals in order to prove the function and communication quality of the serial port.

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Shanghai, China

Xue-Ning Ren