Chartered Semiconductor Manufacturing Ltd (corporation)

Heptagon Micro Optics Pte. Ltd.

Other

Ams Sensors Singapore Pte. Ltd.

Chartered Semiconductor

Xu Yi

Mei Sheng Zhou

Simon Yew-Meng Chooi

Hartmut Rudmann

Simon Gubser

Ji Wang

Subhash Gupta

John Leonard Sudijono

Sudipto Ranendra Roy

Yakub Aliyu

Jens Geiger

Stephan Heimgartner

Susanne Westenhöfer

Kam Wah Leong

John A Vidallon

Qi Chuan Yu

Thng Chong Kim

Paul Kwok Keung Ho

Paul Kwok Ho

Joseph Zhifeng Xie

Sonja Hanselmann

Christoph Friese

Licheng Han

Qichuan Yu

Bojan Tesanovic

Edmund Koon Tian Lua

Ming Jie Lee

Jian Tang

Myo Paing

Hongyuan Liu

Eunice Ho Hui Ong

Sanford Chu

Chit Hwei Ng

Arthur Ang

The present disclosure describes wafer-level processes for fabricating optoelectronic device subassemblies that can be mounted, for example, to a circuit substrate, such as a flexible cable or printed circuit board, and integrated into optoelectronic modules that include one or more optical subassemblies stacked over the optoelectronic device subassembly. The optoelectronic device subassembly can be mounted onto the circuit substrate using solder reflow technology even if the optical subassemblies are composed of materials that are not reflow compatible.

Optoelectronic modules including optoelectronic device subassemblies and methods of manufacturing the same

Optoelectronic device subassemblies and methods of manufacturing the same

Various optoelectronic modules are described that include an optoelectronic device (e.g., a light emitting or light detecting element) and a transparent cover. Non-transparent material is provided on the sidewalls of the transparent cover, which, in some implementations, can help reduce light leakage from the sides of the transparent cover or can help prevent stray light from entering the module. Fabrication techniques for making the modules also are described.

Optoelectronic modules that have shielding to reduce light leakage or stray light, and fabrication methods for such modules

Optoelectronic modules include an optoelectronic device and a transparent cover. A non-transparent material is provided on the sidewalls of the transparent cover, which can help reduce light leakage from the sides of the transparent cover or can help reduce stray light from entering the module. The modules can be fabricated, for example, in wafer-level processes. In some implementations, openings such as trenches are formed in a transparent wafer. The trenches then can be filled with a non-transparent material using, for example, a vacuum injection tool. When a wafer-stack including the trench-filled transparent wafer subsequently is separated into individual modules, the result is that each module can include a transparent cover having sidewalls that are covered by the non-transparent material.

Optoelectronic modules that have shielding to reduce light leakage or stray light

A semiconductor chip having an exposed metal terminating pad thereover, and a separate substrate having a corresponding exposed metal bump thereover are provided. A conducting polymer plug is formed over the exposed metal terminating pad. A conforming interface layer is formed over the conducting polymer plug. The conducting polymer plug of the semiconductor chip is aligned with the corresponding metal bump. The conforming interface layer over the conducting polymer plug is mated with the corresponding metal bump. The conforming interface layer is thermally decomposed, adhering and permanently attaching the conducting polymer plug with the corresponding metal bump. Methods of forming and patterning a nickel carbonyl layer are also disclosed.

Method of copper/copper surface bonding using a conducting polymer for application in IC chip bonding

A new apparatus is provided that can be applied to clean outer edges of semiconductor substrates. Under the first embodiment of the invention, a brush is mounted on the surface of the substrate around the periphery of the substrate, chemicals are fed to the surface that is being cleaned by means of a hollow core on which the cleaning brush is mounted. The surface that is being cleaned rotates at a relatively high speed thereby causing the chemicals that are deposited on this surface (by the brush) to remain in the edge of the surface. Under the second embodiment of the invention, a porous roller is mounted between a chemical reservoir and the surface that is being cleaned, the surface that is being cleaned rotates at a relatively high speed. The chemicals that are deposited by the interfacing porous roller onto the surface that is being cleaned therefore remain at the edge of this surface thereby causing optimum cleaning action of the edge of the surface. After contaminants have been removed in this manner from the surface, the surface can be further cleaned by applying DI water.

Apparatus and methods to clean copper contamination on wafer edge

A method of forming interconnect structures in a semiconductor device, comprising the following steps. A semiconductor structure is provided. In the first embodiment, at least one metal line is formed over the semiconductor structure. A silicon-rich carbide barrier layer is formed over the metal line and semiconductor structure. Finally, a dielectric layer, that may be fluorinated, is formed over the silicon-rich carbide layer. In the second embodiment, at least one fluorinated dielectric layer, that may be fluorinated, is formed over the semiconductor structure. The dielectric layer is patterned to form an opening therein. A silicon-rich carbide barrier layer is formed within the opening. A metallization layer is deposited over the structure, filling the silicon-rich carbide barrier layer lined opening. Finally, the metallization layer may be planarized to form a planarized metal structure within the silicon-rich carbide barrier layer lined opening.

Method of using silicon rich carbide as a barrier material for fluorinated materials

A new method and apparatus is provided that can be applied to clean outer edges of semiconductor substrates. Under the first embodiment of the invention, a brush is mounted on the surface of the substrate around the periphery of the substrate, chemicals are fed to the surface that is being cleaned by means of a hollow core on which the cleaning brush is mounted. The surface that is being cleaned rotates at a relatively high speed thereby causing the chemicals that are deposited on this surface (by the brush) to remain in the edge of the surface. Under the second embodiment of the invention, a porous roller is mounted between a chemical reservoir and the surface that is being cleaned, the surface that is being cleaned rotates at a relatively high speed. The chemicals that are deposited by the interfacing porous roller onto the surface that is being cleaned therefore remain at the edge of this surface thereby causing optimum cleaning action of the edge of the surface. After contaminants have been removed in this manner from the surface, the surface can be further cleaned by applying DI water.

Method and apparatus for removing contaminants from the perimeter of a semiconductor substrate

A method of forming a boron carbide layer for use as a barrier and an etch-stop layer in a copper dual damascene structure, and the structure itself are disclosed. In addition to providing a good barrier to copper diffusion, good insulating properties, high etch selectivity with respect to dielectric insulators, boron carbide also provides good electrical characteristics because of its low dielectric constant of less than 5. The amorphous boron carbide is formed in a PECVD chamber by introducing a boron source gas such as B H , B H , and carbon source gas such as CH and C H at a deposition temperature of about 400&deg; C. Any one, or any combination of the passivation, etch-stop, cap layers of the damascene structure can comprise boron carbide.

Use of boron carbide as an etch-stop and barrier layer for copper dual damascene metallization

A new method is provided for the creation of a fuse. A layer of metal is first deposited, the layer of metal is patterned and etched creating a metal strip that is interrupted by a gap. The fusing function is created in the gap, the interrupted metal strip serves as the connectors to the fuse. A layer of conducting conjugated polymer is deposited over the metal strip and the therein created gap, the polymer is etched back leaving the deposited polymer in the gap between the two metal strips.

Method to form fuse using polymeric films

A new method to avoid post-etch cleaning in a metallization process is described. An insulating layer is formed over a first metal line in a dielectric layer overlying a semiconductor substrate. A via opening is etched through the insulating layer to the first metal line whereby a polymer forms on sidewalls of the via opening. The polymer is treated with a fluorinating agent whereby the polymer is converted to an inert layer. Thereafter, a second metal line is formed within the via opening wherein the inert layer acts is as a barrier layer to complete the metallization process in the fabrication of an integrated circuit device.

Process without post-etch cleaning-converting polymer and by-products into an inert layer

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Singapore, Singapore

Xu Yi