Schlumberger Technology Corporation

Chongqing Boe Optoelectronics Technology Co., Ltd.

Boe Technology Group Co., Ltd.

Lenovo (beijing) Limited

Beijing Boe Technology Development Co., Ltd.

Gemalto Sa

Beijing Lenovo Software Ltd.

Xu Wu

Oliver Clinton Mullins

Zhonghao Huang

Chao Zhang

Elizabeth B Dussan V

Maokun Tian

Felix K Chen

Ming Wang

Tsutomu Yamate

Rogerio Tadeu Ramos

Yongliang Zhao

Philip Rabbito

Hongru Zhou

Zhiyong Ning

Kunkun Gao

Yutong Yang

Can Wang

Rui Wang

Kai Wang

Arthur H Hartog

Li Jiang

Wei Shen

Dan Liu

Timothy Gareth John Jones

Peter S Hegeman

Jacques A Jundt

Christian Chouzenoux

Andrew L Kurkjian

Anthony R H Goodwin

Jian Yuan Wu

Charles Flaum

Chengli Dong

Ricardo Vasques

Colin Allan Wilson

Toru Terabayashi

Fabien Cens

Tullio Moscato

John Barry Fitzgerald

Juei Igarashi

Robert Van Kuijk

Timothy G J Jones

Marian Faur

Hong Cao

Russell D Kane

Soon Seong Chee

Gary W Corris

Kenneth E Stephenson

Rong Wu

Jacques Sellin

Dexter Myles Mootoo

Fa Wang

Edmund J Fordham

Hailiang Li

Richard W Gaylor

Zhaojun Wang

Frederique Kalb

Xiaonan Dong

Yannan Chen

Dimitri Cadere

Henning Groenzin

Donald Charles McKeon

Chengjun Qi

Fan Zhong

Ping Lee

Cedric Collomb

Jianfei Shi

Simon Choi

Baosheng He

Remy Parmentier

Wes C Wofford

Clelia Canuel

Yuanyao Dou

A half via hole structure, a method for manufacturing the same, an array substrate, and a display panel are provided. The half via hole structure includes: a spacer layer arranged on an underlaying substrate; a passivation layer arranged on the spacer layer and provided with a first via hole, an orthographic projection of the first via hole on the underlaying substrate being within that of the spacer layer on the underlaying substrate; a first conductive layer arranged on the spacer layer and having a width smaller than a diameter of the first via hole; an insulating layer arranged between the spacer layer and the passivation layer and provided with a second via hole; and a second conductive layer arranged on the passivation layer and overlapped with the first conductive layer through the first via hole.

Half via hole structure, manufacturing method thereof, array substrate, and display panel

A shift register, a gate drive circuit, and a display panel are provided. The shift register includes an input sub-circuit configured to pre-charge a pull-up node using an input signal; an output sub-circuit configured to output a clock signal through an signal output terminal; a pull-down control sub-circuit configured to control a potential of a pull-down node using a power supply voltage signal; a first pull-down sub-circuit configured to pull down a potential of the pull-down node using a first preset voltage signal; and a first control sub-circuit configured to control the potential of the pull-up node using a second preset voltage signal in response to the potential of the pull-down node; a potential of the first preset voltage signal is lower than a potential of a non-operating level signal of the first pull-down sub-circuit, but higher than a potential of the second preset voltage signal.

Shift register, gate drive circuit and display panel

An array substrate includes a base substrate, a light-shielding pattern, a buffer pattern, an active layer, a gate insulating layer and a first passivation layer provided with a first via, a second via and a third via, and a source and a drain. An entire orthographic projection of the active layer on the base substrate coincides with an orthographic projection of at least part of the buffer pattern on the base substrate. The orthographic projection of the buffer pattern on the base substrate is within a border of an orthographic projection of the light-shielding pattern on the base substrate, and its area is less than an area of the orthographic projection of the light-shielding pattern on the base substrate. One of the source and the drain is coupled to the active layer through the first via, and another one is coupled to the active layer through the second via and the light-shielding pattern through the third via.

Array substrate and method for manufacturing the same, display panel and display device

The disclosure relates to an array substrate. The array substrate may include a base substrate, an auxiliary electrode, a thin film transistor, a first insulating layer, a first electrode, a second insulating layer, and a second electrode sequentially arranged in a direction away from the base substrate. The auxiliary electrode is between the first insulating layer and the second insulating layer and insulated from the first electrode, the auxiliary electrode is coupled to a drain of the thin film transistor through a first via hole in the first insulating layer, and the second electrode is coupled to the auxiliary electrode through a second via hole in the second insulating layer.

Array substrate and manufacturing method thereof, display panel and display apparatus

Disclosed is a display device, a manufacturing method thereof and a display apparatus. The display device includes a carrier having a first surface and a second surface opposite to each other, and at least one nanotube in the carrier. Each nanotube includes a tube wall and a receiving cavity surrounded by the tube wall. The receiving cavity includes a first open end at the first surface and a second open end at the second surface. The display device further includes a first electrode at the first open end, a second electrode at the second open end and a light-emitting layer between the first electrode and the second electrode.

Display device including OLED surrounded by nanotube extending through carrier, and manufacturing method thereof

The present application discloses a thin film transistor. The thin film transistor includes a base substrate; an active layer; an etch stop layer on a side of the active layer distal to the base substrate; and a source electrode and a drain electrode on a side of the etch stop layer distal to the active layer. The active layer includes a channel region, a source electrode contact region, and a drain electrode contact region. An orthographic projection of the etch stop layer on the base substrate surrounds an orthographic projection of the drain electrode contact region on the base substrate. An orthographic projection of the source electrode contact region on the base substrate at least partially peripherally surrounding the orthographic projection of the etch stop layer on the base substrate.

Thin film transistor, array substrate, display apparatus, and method of fabricating thin film transistor

A thin film transistor and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device are provided. The thin film transistor is provided on a base substrate and includes: an active layer including a first surface and a second surface which are opposite to each other, in which the second surface is closer to the base substrate than the first surface; and a source-drain electrode layer including a source electrode and a drain electrode which are separated from each other and are respectively connected with the active layer; each of the first surface and the second surface is a non-flat surface, and the non-flat surface includes a plurality of depressions and a plurality of protrusions which are alternately arranged.

Thin film transistor and manufacturing method thereof, array substrate and manufacturing method thereof, and display device

The present disclosure provides an array substrate, a method for manufacturing the same, and a display device, which belongs to the field of display technology. The array substrate includes a metal electrode layer, a pad layer, a first insulating layer and a first transparent conductive layer, wherein: the pad layer includes a transparent conductive material, the metal electrode layer includes a conductive layer and protection layers formed on both surfaces of the conductive layer, and the pad layer is connected to the metal electrode layer; the first insulating layer is covered on the metal electrode layer and the pad layer, and the first transparent conductive layer is disposed on the first insulating layer; and a via hole is provided in the first insulating layer, and the first transparent conductive layer is connected to the pad layer through the via hole.

Array substrate, method for manufacturing the same, display device

A method for manufacturing an array substrate includes: forming a metal-oxide semiconductor layer, a first conductive layer and a second conductive layer sequentially on a substrate; and treating the metal-oxide semiconductor layer, the first conductive layer and the second conductive layer in a single patterning process using a mask, to form an active layer, pixel electrodes, a source drain pattern layer which includes source electrodes, drain electrodes and data lines, and a reserved pattern of the first conductive layer which is provided in a same layer as the pixel electrodes and formed on sides of the source electrodes and the data lines close to the active layer. The drain electrode is in direct contact with the pixel electrode, and a partial region of the pixel electrode is unobstructed from the drain electrode.

Array substrate and method for manufacturing the same, display apparatus

Provided are an information processing method and apparatus being applicable to a first electronic device, comprising establishing a communication link between the first and a second electronic device; displaying a first communication interface; judging whether a predetermined condition is satisfied; and displaying a second communication interface when it is judged that the predetermined condition is satisfied; wherein the second communication interface comprises a first area and a second area, the first and second areas are at least partially overlapped, and the first area comprises a first subarea and/or a second subarea, the second subarea is used for displaying first information acquired by the first electronic device, the first subarea is used for displaying second information acquired by the second electronic device, the second area is used for displaying shared information, and at least a part of the shared information is simultaneously displayed on the first and second electronic device.

Information processing apparatus and information processing method

Systems and methods for determining at least one parameter of a fluid in a well are provided. The system has a downhole system deployable into the well, and sensor elements to measure fluid parameter(s) of the fluid in the well. Each of the sensor elements is provided with a base and sensors. The base is positionable on the coiled tubing system about the injection port. The sensors are positionable in the base. Each of the sensors are thermally isolated from each other, and are capable of operating as both a heater to heat the fluid, and as a temperature sensor for measuring a temperature of the fluid. The sensors are operatively interchangeable such that the sensors may selectively heat and measure the temperature of the fluid whereby fluid parameters of the fluid are determined.

System and method for determining downhole fluid parameters

Example methods and apparatus to detect phase separation in downhole fluid sampling operations are disclosed. An example method to detect a phase separation condition of a fluid from a subterranean involves obtaining a sample of the fluid, measuring a first characteristic value of the sample, measuring a second characteristic value of the sample and comparing the first characteristic value to a first reference value associated with a single-phase condition of the fluid to generate a corresponding first comparison result. The example method then compares the second characteristic value to a second reference value associated with the single-phase condition of the fluid to generate a corresponding second comparison result and detects the phase separation condition of the fluid based on the first and second comparison results.

Phase separation detection in downhole fluid sampling

A device and method for measuring a fluid flow velocity and direction. The device includes: a modulator for modulating an incident signal from a fiber optical arrangement. The modulator includes an encoder resulting in a modulated signal having at least a first portion, a second portion and a third portion for each complete rotation of the encoder. The device further includes a processor for determining the fluid flow velocity and direction based on at least the first portion, the second portion and the third portion of the modulated signal. The method includes modulating an incident beam to have a first portion, a second portion and a third portion for each rotation of an encoder and processing the modulated signal to determine a fluid flow velocity and direction.

Device for measuring a fluid flow velocity and direction

The present invention disclosed a method and system of replacing smart cards. It uses a new identification device (a new SIM) to replace an old one (an old SIM) associated with a user account. The new identification device has an identification number (ICCID). The new identification device is activated in the following manner. The old identification device communicates with an identification-management center through a communication interface (mobile telephone). And the identification-management center recognizes the old identification device. The identification number of the new identification device is sent to the identification-management center through the communication interface. The identification-management center checks the identification number. If the identification number is correct, the user account will be assigned to the new identification device by the identification-management center.

Method and system of replacing smart card

A device to measure a fluid pressure comprises a pressure sensing elementand a pressure readout element. The pressure sensing elementcomprises a cavitycapped by a flexible membrane, the cavity having a length d that varies with the fluid pressure Papplied on the flexible membrane. The pressure readout elementcomprises a light sourcefor providing an incident beam of a determined wavelength range directed towards the cavity and an optical spectral analyzerfor measuring a power spectrum of a return beam reflected by the cavity, and processing meansfor determining the cavity length d and the fluid pressure Pbased on the power spectrum.

Pressure measuring device and method

Growing community of inventors

Beijing, China

Xu Wu