Western Digital Technologies, Inc.

Lattice Semiconductor Corporation

Sungrow (shanghai) Co., Ltd.

Xinyu Wang

Jun Xu

Bo Wang

Hua Fang Tan

Hope Chiu

Fen Yu

Shenghua Huang

Yuqing Cui

Donghua Wu

Haiyue Shen

Jiacai Zhuang

Tengfei Wang

A semiconductor memory package includes a substrate, a first stack of memory dies, and a second stack of memory dies. The first stack of memory dies includes a first substack of staggered memory dies offset with respect to each other in a first direction and a second substack of staggered memory dies offset with respect to each other in the first direction and positioned above the first substack. The second stack of memory dies includes a third substack of staggered memory dies offset with respect to each other in a second direction and a fourth substack of staggered memory dies offset with respect to each other in the second direction and positioned above the third substack. The top memory die of the first substack and a memory die positioned below the top memory die of the third substack are at least partially coplanar.

Semiconductor device with unbalanced die stackup

A medium-high voltage energy conversion system, and a control method and a controller therefor are provided. In the control method, an operation state of the medium-high voltage energy conversion system is acquired. In a case that the system is in a normal operation state, the system is controlled to operate in a first direct circuit current source mode. In a case that the system is in a first fault state in which a direct current grid voltage drops, the system is controlled to operate in a direct current voltage source mode. In a case that the system is in a second fault state in which a direct current grid voltage is in an overvoltage state, the system is controlled to operate in a second direct circuit current source mode.

Medium-high voltage energy conversion system, and control method and controller therefor

Various techniques are provided for estimating signal congestion in a programmable logic device (PLD). In one example, a computer-implemented method of estimating signal congestion in routing resources of a PLD is provided. The routing resources comprise a plurality of nodes and a plurality of wires which may be selectively interconnected to provide a plurality of signal paths through the routing resources of the PLD. The method includes determining a plurality of wire congestion values. Each of the wire congestion values identifies a relative likelihood of a corresponding one of the wires being used to provide the signal paths in comparison with the other wires. The method also includes selecting a region of the routing resources. The method further includes determining a congestion density estimate for the region using the wire congestion values associated with the wires of the region.

Congestion estimation for programmable logic devices

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Shanghai, China

Xinyu Wang