Qualcomm Incorporated

Xinwang Zhang

Sherif Galal

Ramkumar Sivakumar

Dongyang Tang

Vijayakumar Dhanasekaran

Jingxue Lu

Kshitij Yadav

Pradeep Charles Silva

ChienChung Yang

Ankit Srivastava

Subbarao Surendra Chakkirala

Earl Schreyer

Qubo Zhou

Hanil Lee

Le Wang

Aspects of the present disclosure relate to apparatus and methods for dynamically adjusting the common-mode input signal of a power amplifier, such as a class-D power amplifier. One example power amplifier circuit generally includes a first amplifier having a signal input and a power input; and a common-mode adjustment circuit having a first input coupled to the power input of the first amplifier, having an output coupled to the signal input of the first amplifier, and being configured to generate a common-mode signal to apply to the signal input of the first amplifier, based on a power supply voltage on the power input of the first amplifier.

Dynamic common-mode adjustment for power amplifiers

Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.

Voltage-to-current architecture and error

A class-D amplifier including a pulse width modulator including an input configured to receive a first signal based on an input signal, and an output configured to generate a pulse width modulated (PWM) signal; an H-bridge including an input coupled to an output of the pulse width modulator and an output coupled to a load, wherein the H-bridge is configured to generate an output signal across the load based on the PWM signal; and a deadtime compensation circuit coupled to the H-bridge, wherein the deadtime compensation circuit is configured to compensate for deadtime distortion in the output signal. The deadtime compensation circuit may be a feedback circuit between an output of the H-bridge and an input of the pulse width modulator, a pulse modification circuit at the output of the pulse width modulator, or an offset signal generating circuit providing an offset signal to the pulse width modulator.

Class-D amplifier with deadtime distortion compensation

Voltage-to-current architecture and error correction schemes

A power amplifier provides reduction of click and pop in audio applications. The power amplifier includes a first amplifier and an auxiliary amplifier. The auxiliary amplifier is used to ramp the power amplifier output from ground to an offset voltage to reduce the 'click and pop' sound. The first amplifier and the auxiliary amplifier having a shared feedback loop. An output of the first amplifier and an output of the auxiliary amplifier may be switchably coupled to the shared feedback loop. A wave generator controls a switch to couple the first amplifier output or the auxiliary amplifier output to the shared feedback loop.

Audio power amplifier for reduced click and pop (CnP)

In one embodiment, a method for speaker operation comprises sensing an input common mode signal of a driver, wherein the driver drives a speaker, and adjusting the input common mode signal of the driver based on a difference between the sensed input common mode signal and a reference signal. The method also comprises sensing a current of a coil of the speaker, and control an output volume of the speaker based at least in part on the sensed current.

Speaker protection circuit with improved accuracy

A driver circuit includes detectors responsive to the operating region that a driven switch is operating in. The driver circuit is operative to drive the gate of the driven switch at a speed responsive to the output of the detectors.

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San Diego, CA, United States of America

Xinwang Zhang