Huawei Technologies Co., Limited

Xinru Wang

Xin Jin

Qian Xie

Yong Gen He

Yangyang Tang

Jianping Guo

Zhonglei Yang

Yiwei Fu

Yong He

Guoxin Yang

A voltage regulation method, a controller, and a chip are provided. In the method, a controller receives a digital first status representation value sent by a sensor; the controller determines, according to the first status representation value and at least one of a second status representation value or a first expected value, whether to regulate the supply voltage of the load, where the second status representation value represents a node voltage that is at a previous moment and that is of the detection point of the load, and the first expected value represents an expected value of a node voltage of the detection point; and when determining to regulate the supply voltage of the load, the controller sends a digital control signal to a power gating array, to control the power gating array to regulate the supply voltage.

Voltage regulation method, controller, and chip

A voltage generation apparatus includes: a controller, a first voltage division controller, a second voltage division controller, and a voltage detector. The first voltage division controller and a load are connected in series between an input power supply and ground. The second voltage division controller and the load are connected in parallel between ground and a connection point between the first voltage division controller and the load. The voltage detector is electrically connected to the load, and is configured to: detect a load voltage of the load, and feed back a detected value of the load voltage to the controller. The controller is configured to: receive the detected value fed back by the voltage detector, and generate a control signal based on the detected value. The control signal is used to control the first voltage division controller and the second voltage division controller.

Voltage generation apparatus and semiconductor chip

A method and a system for processing a data conflict are provided that relate to the field of signal interface technologies of an integrated circuit, where the method includes sending a power management bus (PMBus) command to a slave device by using a PMBus, so as to perform power management; when the PMBus command fails to be sent, determining whether the number of times that the PMBus command fails to be sent is greater than or equal to a preset value, where the preset value is configured in advance during system initialization; starting timing if the number of times that the PMBus command fails to be sent is less than the preset value; and resending the PMBus command when timing duration reaches resending time. The present invention is applicable to a scenario in which multiple master devices (Masters) send the PMBus command by using the PMBus.

Method and system for processing data conflict

The present invention discloses an adaptive voltage scaling circuit and a chip. The adaptive voltage scaling circuit includes a performance classification monitor and an adaptive controller, where the performance classification monitor is disposed inside the chip, and is configured to detect working performance of the chip at a current working voltage, and output a detection result signal to the adaptive controller; and the adaptive controller is connected to the performance classification monitor, and is configured to output a control signal to a power management module of the chip according to the detection result signal output by the performance classification monitor, where the control signal is used to control the power management module to adjust a working voltage of the chip. In embodiments of the present invention, test workload can be reduced.

Adaptive voltage scaling circuit and chip

Embodiments of the present invention provide an adaptive voltage scaling method, chip, and device. An aging effect-related state parameter in a chip is obtained at a first voltage adjustment time point. The first voltage adjustment time point is one of multiple voltage adjustment time points set for the chip. An aging compensation voltage corresponding to the first voltage adjustment time point is determined according to the state parameter. A minimum operating voltage of the chip is compensated for according to the aging compensation voltage, so as to adjust an operating voltage of the chip.

Adaptive voltage scaling method, chip, and system

The application discloses a voltage regulation method, and a corresponding HPM, chip, and chip system. The method is used to regulate a working voltage of the chip, which includes an AVS module and at least one HPM. The method includes: outputting, by the AVS module, a clock signal to the HPM; generating, by the HPM, a corresponding pulse signal according to the clock signal and at least performing first delaying for the pulse signal to acquire a first actual output value and performing second delaying for the pulse signal to acquire a second actual output value; and fitting, by the AVS module, the first and second actual output values at least according to weights of the first and second actual output values to acquire a fitting output value and determine, by comparing the fitting output value with a predetermined reference value, whether to regulate the working voltage of the chip.

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Shanghai, China

Xinru Wang