Peking University

Xinnan Lin

Zhiyuan Zhang

Dan Li

Jin Qiang He

Haijun Lou

Shuhao Xiong

Disclosed are method and an apparatus for analysis of an interface state of a MIS-HEMT device. By means of establishing an equivalent model of MIS-HEMT(s) that includes equivalent circuits representing a dielectric layer, a barrier layer and a channel layer, plotting a group of a capacitance-frequency function curve and a conductance-frequency function curve that can be best fitted to the measured capacitance-frequency scatter diagram and the measured conductance-frequency scatter diagram via the equivalent model, taking such best-fitted group as the fitted function curve group, and calculating parameters about the interface state of MIS-HEMT(s) according to the group of assigned values corresponding to the fitted function curve group, the parameters of the analyzed interface state can be more accurate since the fitted frequency function curve group can, with the aid of the equivalent model, simultaneously fit the measured capacitance-frequency scatter diagram and the measured conductance-frequency scatter diagram.

Method and apparatus for analysis of interface state of MIS-HEMT device

A method and apparatus for selecting an integrated circuit device neural network modeling sample; for an input variable having the largest mean impact value, by means of continually and equally dividing an interval of the input variable, until relative errors of all divided intervals are equal to or less than a preset error precision, only at which point the equal division action stops, and the length of the divided interval having the smallest length being taken as a step length of the output variable; the step lengths of other input variables then being respectively calculated, according to the step length of the input variable; and finally, for each input variable, points being extracted according to a change interval and the step length thereof, thereby obtaining a sample point set of each input variable. Thus, a low amount of sample data may be selected under the condition of a given precision, the low sample data amount further saving testing expenditures required by device modeling, and increasing the training speed of a neural network.

Method and apparatus for selecting integrated circuit device neural network modeling sample

A tunneling field effect transistor, comprising a gate electrode layer, a gate dielectric layer, a source region, a connected region and a drain region, wherein the source region comprises a first source region and a second source region, the second source region comprising an inner layer source region and an outer layer source region. The connected region comprises an expansion region and a high-resistance region. The doping types of materials of the inner layer source and the outer layer source region are opposite, and the forbidden bandwidth of the material of the inner layer source region is less than that of the outer layer source region. The contact surface formed by way of covering the inner layer source region by the outer layer source region is a curved surface. Since a contact surface of an outer layer source region and an inner layer source region of a tunneling field effect transistor is of a curved surface structure, the contact area of the outer layer source region and the inner layer source region is increased, and the probability of tunneling of a carrier through the contact surface is increased. Therefore, the On-state current is increased, thereby having a good current drive capability.

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Xinnan Lin