Zte Corporation

Shenzhen Pango Microsystems Co., Ltd.

Xinjian Chen

Yuanjun Liang

Yonghui Ren

Yingxin Wang

Rongxing Ban

Disclosed are a clock and data recovery circuit, method and apparatus. The circuit comprises a receiving module for receiving an analog signal; a first equalization module connected to the receiving module, the first equalization module comprising a first totalizer and a second totalizer; a first sampling module connected to an output end of the first totalizer, the first sampling module comprising a first edge sampler and a second edge sampler that are connected to the output end of the first totalizer, respectively; a second sampling module connected to an output end of the second totalizer; a data processing module connected to both the first sampling module and the second sampling module; a clock recovery module connected to the data processing module; and an output module connected to the clock recovery module. In the present application, by means of the manner, a phase can be adjusted using a bias voltage, thereby accurately recovering clock information.

Clock and data recovery circuit, method and apparatus

Provided are a connector structure, and a skew calculation method and device. Specifically, the connector structure includes: a first Printed Circuit Board (PCB) (), which includes a first board () and a second board (), and is connected to a testing device; and a second PCB (), which includes a third board () and a fourth board (), and is connected to the testing device. The first board () is connected to the third board () through a connector ().

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Shenzhen, China

Xinjian Chen