Chinese Academy of Sciences

Institute of Microelectronics of the Chines Academy of Sciences

University of Science and Technology Beijing

Xinhua Wang

Xinyu Liu

Sen Huang

Ke Wei Wei

Chao Zhao

Wenwu Wang

Jing Wang

Xia Tian Zhang

Yan Jiang

Junfeng Li

Xiaoli Wang

Wen Wen Yang

Bin Han

Min Jiang

Junfeng Guo

Zhipeng Bai

Ke Wei

Chunmei Geng

Baohui Yin

Qilong Bao

Fengwen Mu

Xiujun Zhu

Yuankun Wang

Xueyan Zhao

Haibo Yin

Wengang Sheng

Zhigang Xu

Zhijun Zhang

Yonglin Kang

Han Ma

Jianchao Ma

Jinbo Qu

Guoming Zhu

Hang Yu

The present disclosure relates to the technical field of semiconductors. Disclosed is a multi-layer semiconductor material structure and a preparation method thereof, solving the problems of the existing semiconductor materials that have poor heat dissipation, high cost, and cannot be mass-produced. The multi-layer semiconductor material structure includes a highly thermally conductive support substrate and a crystallized device function layer, where the device function layer is provided on the highly thermally conductive support substrate, and has a single-crystal surface layer.

Multi-layer semiconductor material structure and preparation method thereof

A GaN-based superjunction vertical power transistor and a manufacturing method thereof. The transistor includes: a N-GaN layer; a first P-GaN layer as a current blocking layer, formed on the N-GaN layer and having a gate region window; and a thin barrier Al(In, Ga)N/GaN heterostructure conformally formed on the current blocking layer and filling the bottom and one or more sidewalls of the gate region window, wherein the N-GaN layer has an etched groove completely or partially filled with a second P-type GaN layer, an N-GaN layer is formed under the second P-type GaN layer, and the N-GaN layer is in direct contact with the second P-type GaN layer and the N-GaN layer to form a superjunction composite structure.

GaN-based superjunction vertical power transistor and manufacturing method thereof

The present invention provides a method for processing a filter to obtain a calibration dust filter, and a method for off-site calibration using the calibration dust filter. In the present invention, a batch of filters that meets specific requirements is screened out as the basal filters, and then the basal filters are processed in an actual environment to obtain the calibration dust filters. The counted number of beta particles is measured before and after sampling, and then a correction factor K is inversely inferred. The beta attenuation suspended particulate analyzer is corrected using the correction factor K. It can be known from a calculation result in an embodiment that, when the beta attenuation suspended particulate analyzer is calibrated using the calibration dust filter, the concentration measured by the calibrated beta attenuation suspended particulate analyzer is more closer to the manually measured concentration, with a CV value roughly equal to 7% to 8%, thus better reflecting variations in pollution concentration of PM in the air.

Method for processing filter to obtain calibration dust filter, and method for off-site calibration using calibration dust filter

A GaN-based enhancement-mode power electronic device and a method for manufacturing the same. The GaN-based enhancement-mode power electronic device comprises: a substrate; a thin barrier Al(In,Ga)N/GaN heterostructure formed on the substrate; a gate, a source, and a drain formed on the thin barrier Al(In,Ga)N/GaN heterostructure. An AlN or SiNx passivation layer is formed on access regions between the gate and the source and between the gate and the drain, respectively, such that two dimensional electron gas is recovered in channels of the thin barrier Al(In,Ga)N/GaN heterostructure below the MN passivation layer by utilizing the MN passivation layer having polarization characteristics, or by using the SiNx passivation layer with positive fixed bulk/interface charges, so as to reduce on-resistance of the device and inhibit high-voltage current collapse in the device.

Semiconductor device and method for manufacturing the same

A method for manufacturing a low interface state device includes performing a remote plasma surface process on a III-Nitride layer on a substrate; transferring the processed substrate to a deposition cavity via an oxygen-free transferring system; and depositing on the processed substrate in the deposition cavity. The deposition may be low pressure chemical vapor deposition (LPCVD). The interface state between a surface dielectric and III-Nitride material may be significantly decreased by integrating a low impairment remote plasma surface process and LPCVD.

Low interface state device and method for manufacturing the same

A GaN-based power electronic device and a method for manufacturing the same is provided. The GaN-based power electronic device comprising a substrate and an epitaxial layer over the substrate. The epitaxial layer comprises a GaN-based heterostructure layer, a superlattice structure layer and a P-type cap layer. The superlattice structure layer is provided over the heterostructure layer, and the P-type cap layer is provided over the superlattice structure layer. By using this electronic device, gate voltage swing and safe gate voltage range of the GaN-based power electronic device manufactured on the basis of the P-type cap layer technique may be further extended, and dynamic characteristics of the device may be improved. Therefore, application process for the GaN-based power electronic device that is based on the P-type cap layer technique will be promoted.

GaN-based power electronic device and method for manufacturing the same

Growing community of inventors

Beijing, China

Xinhua Wang