Mips Technologies, Inc.

Abbvie Inc.

XingYu Jiang

John L Kelley

Ying-wai Ho

Venkat Reddy Mali

Kevin R Woller

Zhiguo Bian

Akinori Okano

Elizabeth L Noey

Violeta L Marin

Jason P Burke

Shahab Mortezaei

Joshua N Payette

Ashley M Adams

Alexey A Rivkin

Xianrui Zhao

Spencer Scholz

Jeffery Zablocki

The present invention provides for compounds of formula (I) wherein R, R, R, R, R, and R, are as defined herein, and pharmaceutically acceptable salts thereof, that are useful as agents in the treatment of CLL.

Pyrimidines for degrading Bruton's tyrosine kinase

Floating-point processors capable of performing multiply-add (Madd) operations and incorporating improved intermediate result handling capability. The floating-point processor includes a multiplier unit coupled to an adder unit. In a specific operating mode, the intermediate result from the multiplier unit is processed (i.e., rounded but not normalized or denormalized) into representations that are more accurate and easily managed in the adder unit. By processing the intermediate result in such manner, accuracy is improved, circuit complexity is reduced, operating speed may be increased.

Processor with improved accuracy for multiply-add operations

A method and apparatus predict whether an overflow or underflow floating-point exception could occur as a result of a data processing system performing a particular floating-point operation. Predictions are made based on at least one overflow threshold value, at least first and second underflow threshold values, and a preliminary result exponent value derived from the values of the exponents of the floating-point numbers that are about to be acted upon. The preliminary result exponent is compared to an overflow or underflow threshold value in order to predict whether there is a possibility that an overflow or underflow floating-point exception could occur. Overflow and underflow exceptions are predicted and an exception prediction signal is generated. The exception prediction signals that are generated may be used by data processing system control units, for example, to temporarily halt any parallel processing operations that may be affected by an overflow or underflow floating-point exception.

Method and apparatus for predicting floating-point exceptions

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San Jose, CA, United States of America

XingYu Jiang