Nxp B.v.

St-Ericsson Sa

Xin He

Jan Van Sinderen

Nenad Pavlovic

Manel Collados Asensio

Frank Leong

Johannes H A Brekelmans

Manel Collados

Manuel Collados Asensio

An apparatus including a transmitter including a pulsed Radio Frequency (RF) source coupled to an antenna. A receiver includes an amplifier coupled to the antenna. A controller is configured to adjust one or more durations of a ranging cycle of the apparatus, wherein the ranging cycle includes a first duration of a gated mode and a second duration of a non-gated mode. The gated mode blinds the amplifier during a transmission of the transmitter. The non-gated mode reduces a gain of the amplifier during the transmission.

Impulse radar using variable pulse repetition frequency

A voltage sampling RF receiver in which an impedance control circuit controls the input impedance, by using a mixer stage which generates a feedback voltage, which is coupled to the RF input by a feedback resistor. A biasing arrangement can be used to adjust the feedback path so that local oscillator leakage signals are suppressed.

RF receiver with voltage sampling

The present application relates to at least one digitally controlled oscillator and a data modulation device. More particularly, the digital polar transmitter comprises at least one digitally controlled oscillator configured to generate at least one frequency. The digital polar transmitter comprises a data modulation device, wherein the data modulation device comprises at least one data input terminal, at least one output terminal, and at least one frequency input terminal, wherein the output terminal is connected to the digitally controlled oscillator. The digital polar transmitter comprises a phase measuring device configured to measure phase information from the output signal of the data modulation device for every frequency sample. The digital polar transmitter comprises a phase error detecting device configured to detect a phase error at least depending on the measured phase information, wherein the phase error detecting device is configured to apply the detected phase error to the output signal of the data modulation device.

Polar transmitter

A multimode receiver has a transconductance amplifier having an input terminal and adapted to receive a voltage RF signal and to deliver a current RF signal. The amplifier has a current mixer coupled to the transconductance amplifier and adapted to receive the current RF signal, the current mixer being adapted to combine the current RF signal with a signal generated by a local oscillator, the mixer generating an intermediate frequency signal having a frequency that equals a combination of a frequency of the current RF signal and a frequency of the local oscillator. A low-pass filter is coupled to the mixer and is adapted to generate a low-pass current signal. A transimpedance amplifier is coupled to the low-pass filter and is adapted to receive the low-pass current signal, the transimpedance amplifier being adapted to generate an intermediate frequency voltage signal proportional with the low-pass current signal. A first switch is adapted to receive a signal proportional with the intermediate frequency voltage signal at a first end, a second end being coupled to the input terminal and a second switch is coupled between the input terminal and a reference terminal. The first and second switches are mutually exclusive in an ON state in a specific mode of operation of the multimode receiver.

Multimode receiver with a translational loop for input matching

A circuit for producing multiple switching control signals for a harmonic rejection mixer from multiple phases of a digital local oscillator signal is presented, wherein a first waveform combiner circuit is arranged to generate from the multiple phases of the digital local oscillator signal at least one switching control signal by logical combining two from the multiple phases of a digital local oscillator signal, and a second waveform combiner circuit is arranged to generate from the multiple phases of the digital local oscillator signal at least one first switching control signal by logical combining one from the multiple phases of a digital local oscillator signal with a predetermined signal having a static logical value. To compensate for phase errors the schematic topology of the first and the second waveform combiner circuit are arranged to be fully symmetrical to each other in that in the first waveform combiner, the circuit part for providing the function of the second waveform combiner is used as a dummy circuit, and in the second waveform combiner, a circuit part for providing the function of the first waveform combiner is used as a dummy circuit. Accordingly, the sources for providing the multiple phases of the digital local oscillator signal see the same load, and hence required phase shift is guaranteed.

Calibration-free local oscillator signal generation for a harmonic-rejection mixer

Calibration data for calibrating time to digital conversion is obtained by switching a feed circuit of a time to digital converter between a normal operating mode or a calibration mode. A delay circuit with a delay circuit input and a plurality of taps outputs. A sampling register samples data from the data inputs. The feed circuit provides for selection of transitions of the oscillator signal that control timing of a first active transition at the clock circuit after a transition at the delay circuit input. A control circuit switches the feed circuit between normal operating mode and calibration mode, and controls the feed circuit successively to select a plurality of different transitions to control timing of the first active transition in the calibration mode. The control circuit reads out resulting data from the sampling register for each selection and determines calibration data for the oscillator signal from said data.

Circuit with a time to digital converter and phase measuring method

The present invention relates to a mixer circuit and method of frequency transformation, wherein an input signal is switched in accordance with a first local oscillator signal and in accordance with at least one second local oscillator signal having a smaller duty cycle than said first local oscillator signal, or having a respective predetermined phase shift with respect to said first local oscillator signal. Output signals obtained by the switching in accordance with the first and at least one second local oscillator signals are summed and the polarity of one of said first local oscillator signal and said at least one second local oscillator signal is switched in response to a control input, to thereby switch between a harmonic-rejection mode and a sub-harmonic mixing mode.

Dual-mode mixer circuit and method

An output stage () for a digital RF transmitter is provided. The output stage comprises: an input adapted to receive an input signal (RFin, b-b) to be transmitted; a plurality N of power amplification sections (S, S, S, S); and an output (A, B) providing an output voltage signal. Each of the N power amplification sections (S, S, S, S) is arranged to receive the input signal (RFin, b-b) and comprises a transformer (T, T, T, T) adapted to provide a respective output signal. Each transformer comprises a primary stage and a secondary stage; the secondary stages of the transformers (T, T, T, T) of the N power amplification sections (S, S, S, S) are combined such that a combined output voltage signal of the output stage is provided. The N power amplification sections (S, S, S, S) are adapted such that the input signal (RFin, b-b) is latched by clock signals (clock, clock, clock, clock) comprising different phases.

Output stage for a digital RF transmitter, method for providing an RF output signal in a digital RF transmitter, and digital RF transmitter

The present application relates to a digital modulator comprising an output stage comprising a number of unit cell arrays, and a sampling stage. The present application relates also to a communication device comprising said digital modulator, a method for digitally modulating and a computer program product. More particularly, the digital modulator comprises an output stage comprising a number of unit cell arrays, wherein the output stage comprises at least one carrier frequency signal input terminal configured to receive a carrier frequency signal. The digital modulator comprises a sampling stage connectable to the output stage, wherein the sampling stage is configured to oversample at least one data input signal. The digital modulator comprises at least one sampling clock generating device configured to generate at least one sampling clock signal depending on the number of arranged unit cell arrays and the carrier frequency signal.

Growing community of inventors

Waalre, Netherlands

Xin He