Boe Technology Group Co., Ltd.

Beijing Boe Display Technology Co., Ltd.

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Beijing Boe Optoelectronics Technology Co., Ltd.

Fuzhou Boe Optoelectronics Technology Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Wuhan Boe Optoelectronics Technology Co., Ltd.

Xibin Shao

Yanping Liao

Zhihua Sun

Seungmin Lee

Hongming Zhan

Yingmeng Miao

Dan Wang

Dongchuan Chen

Ming Jin Chen

Feifei Wang

Feng Qu

Jieqiong Wang

Qiujie Su

Jiantao Liu

Gang Wang

Xin Duan

Yu Ma

Zhenyu Zhang

Hebin Zhao

Cong Wang

Zhangtao Wang

Shulin Yao

Yingying Qu

Hailin Xue

Chuncheng Che

Peizhi Cai

Chao Tian

Xiaofeng Yin

Xin Wang

Jing Li

Rui Ma

Kaixuan Wang

Jianfeng Yuan

Xiaona Liu

Ying Wang

Ke Fei Wang

Daekeun Yoon

Fengchun Pang

Shou Li

Weihao Hu

Jing Wang

Ming Lei Zhang

Ming Hu

Jianbo Xian

Hao Liu

Zheng Wang

Jing Liu

Lei Guo

Ke Dai

Xiaodong Xie

Zhe Li

Tong Yang

Zhanchang Bu

Jie Liu

Liang Sun

Huibin Guo

Yue Geng

Haipeng Yang

Bin Feng

Xue Cao

Junrui Zhang

Zhuo Zhang

Le Gu

Yue Yang

Kai Diao

Xue Dong

Yan Li

Xin Li

Peng Hui Jiang

Weijie Zhao

Li Wang

Qi Cheng Li

Dong Wang

Liang Zhang

Jing Lv

Lei Liu

Peng Li

Xiao Lin Sun

Xianjie Shao

Tao Yang

Feng Zhao

Yan Zhang

Rui Zhang

Yi Liu

Xiao Wang

Dong Hui Liu

Xiaoye Ma

Xiuyun Chen

Bo Feng

Rui Guo

Bochang Wang

Guangquan Wang

Ting Dong

Jie Wu

Shuai Hou

Xingxing Zhao

Zongze He

Hongjiang Wu

Ruifang Du

Yujie Gao

There is provided a gate driving circuit, a display panel and a driving method of the gate driving circuit. The gate driving circuit includes multiple stages of shift registers. The multiple stages of shift registers comprise N first shift registers arranged alternately with N second shift registers. The N first shift registers are cascaded-coupled as N stages of first shift registers, and are configured to generate N first output signals under control of K first clock signals. The N second shift registers are cascaded-coupled as N stages of second shift registers, and are configured to generate N second output signals under a control of K second clock signals. K and N are both integers greater than 1, and K≤N.

Gate driving circuit and driving method thereof and display panel

A liquid crystal display panel includes a first base, a second base disposed opposite to the first base, a liquid crystal layer and a first optical compensation layer that are disposed between the first base and the second base, and a second optical compensation layer disposed on a side of the first base away from the liquid crystal layer or on a side of the second base away from the liquid crystal layer. An orthogonal projection of an optic axis of the first optical compensation layer on the first base is parallel to orthogonal projections of optic axes of liquid crystal molecules in the liquid crystal layer on the first base. An orthogonal projection of an optic axis of the second optical compensation layer on the first base is perpendicular to the orthogonal projection of the optic axis of the first optical compensation layer on the first base.

Liquid crystal display panel and method of manufacturing the same, and display device

A front light source module is provided to include a side light source; a light guide layer with a light incident side opposite to the side light source in a first direction; and a first light adjusting layer, the first light adjusting layer and the light guide layer are stacked in a third direction, a portion of the first light adjusting layer away from the light guide layer is provided with micro-groove structures, each including: a first inclined surface and a second inclined surface opposite to each other in the first direction, the first inclined surface is configured to face the light incident sid, closer to the light incident side than the second inclined surface, angle α between the first inclined surface and a plane where a surface of the first light adjusting layer away from the light guide layer is located is in a range from 26° to 42°.

Front light source module and display apparatus

A display substrate has a display area and an encapsulation area around the display area. The display substrate includes a substrate and a spacer layer. The spacer layer is located on a side of the substrate, and includes a plurality of first columnar spacers located in the encapsulation area and distributed at intervals around the display area, and bottom ends of the plurality of first columnar spacers are fixedly disposed on the substrate. Ends of the plurality of first columnar spacers proximate to the substrate are the bottom ends thereof, and ends of the plurality of first columnar spacers away from the substrate are top ends thereof.

Display substrate and manufacturing method therefor, and display device

The present disclosure provides a display panel driving method, a display panel and a display device, the method comprising: comprising alternately configure display time periods and touch time periods in one time frame, at least one touch time period being configured, and at least two display time periods being configured; sequentially scanning in each display time period a portion of gate lines in a display panel; and pausing in each touch time period the scanning of all gate lines, and performing touch recognition, wherein in a display time period adjacent to a touch time period, level compensation is performed on a gate line to be compensated, and the gate line to be compensated is at least one gate line that starts to scan in the display time period adjacent to the touch time period.

Driving method for display panel, display panel, and display device configured with time frame comprising at least two display time periods and at least one touch time period which are alternately configured

The disclosure provides a display device and a holographic display apparatus. The display device includes a display panel including a first linear polarizer located on a light-emitting side, so that the display panel emits linearly polarized image light; and a phase modulation panel disposed on the light-emitting side of the display panel and configured to perform phase modulation on the linearly polarized image light. The holographic display apparatus includes the display device.

Display device and holographic display apparatus

A display driving method and a display device are provided. The display driving method includes: scanning a plurality of subpixels arranged in an NΔM array row by row or in multiple rows to turn on each row of scanned subpixels, so that the duration when two adjacent rows of subpixels are simultaneously in a turn-on state is greater than or equal to two times a unit scan time, the unit scan time being the time required for scanning one row of subpixels, and N and M both being integers greater than 1; and applying data signals to at least two rows of subpixels that are simultaneously in the turn-on state, so that the duration when data signals are applied to at least some rows of subpixels is greater than the unit scan time.

Display driving method for increasing charging duration and display device

The present disclosure relates to a touch display device and a driving method for the touch display device. The touch display device comprises data lines, gate lines, pixel electrodes located within display areas defined by the data lines and the gate lines, and a driving circuit. The driving circuit is configured to provide a first display data signal to the data lines during a display stage of the touch display device, and is configured to provide a second display data signal to the data lines during a predetermined period adjacent to the display stage within a touch stage of the touch display device, and provide an off-signal to the gate lines during the predetermined period such that the second display data signal is not provided to the pixel electrodes.

Touch display device and driving method for the touch display device

An array substrate, including: a base substrate, and a plurality of first signal lines, a plurality of second signal lines, a plurality of touch-control signal lines, a first transparent conductive layer and a second transparent conductive layer, which are arranged on the base substrate. The first transparent conductive layer and the second transparent conductive layer are located on the side of the touch-control signal lines that is away from the base substrate. The touch-control signal lines are connected to at least one touch-control sensing block, which includes a plurality of touch-control electrodes connected to each other and spaced apart from each other; and the first transparent conductive layer or the second transparent conductive layer includes the plurality of touch-control electrodes. The plurality of first signal lines and the plurality of second signal lines intersect to form a plurality of sub-pixel regions, which include opening regions.

Array substrate and preparation method therefor, and touch-control display apparatus

The present disclosure provides an array substrate and a display device. The array substrate includes one start data line, N−1 intermediate data line and one end data line. The array substrate further includes a first driving circuit and a second driving circuit, the first driving circuit is arranged at a first side of the plurality of data lines, and the second driving circuit is arranged at a second side of the plurality of data lines opposite to the first side in a first direction. The first driving circuit is electrically connected to the first end of each of the plurality of data lines. The first driving circuit is electrically coupled to first ends of the plurality of data lines, a first end of the end data line is electrically coupled to a first end of the start data line, and the second driving circuit is electrically coupled to second ends of the plurality of data lines.

Array substrate and display device

A display panel, a driving method for the display panel and a display device. The display panel includes a gate driving circuit, the gate driving circuit includes shift registers of a plurality of stages arranged in sequence, the shift registers of the plurality of stages arranged in sequence are combined into N groups of gate driving sub-circuits, and shift registers in the N groups of gate driving sub-circuits are cascaded, respectively; an m-th group of gate driving sub-circuits in the N groups of gate driving sub-circuits comprises a shift register of an m-th stage and a shift register of an (m+L*N)th stage that are cascaded, where m is an integer that is greater than or equal to 1 and less than or equal to N, L is an integer that is greater than or equal to 1, N is an even number that is greater than or equal to 2.

Display panel, driving method for the display panel and display device

A display substrate, including: a base substrate; a plurality of data lines on the base substrate; a first insulating layer on a side of the plurality of data lines away from the base substrate; a plurality of gate lines on a side of the first insulating layer away from the plurality of data lines, where extension directions of the gate and data lines are intersected; a second insulating layer on a side of the plurality of gate lines away from the first insulating layer; and a first electrode on a side of the second insulating layer away from the plurality of gate lines, where at least a portion of an orthographic projection of the first electrode on the base substrate is within an region surrounded by orthographic projections of two adjacent data lines on the base substrate and orthographic projections of two adjacent gate lines on the base substrate.

Display substrate, display panel and display device

At least one chip group and a group of first PLG wirings corresponding to each of the chip groups are disposed in a first bonding area, each of the chip groups includes at least two groups of chip units, each group of the chip units includes at least one gate drive chip, each group of the first PLG wirings includes a first wiring and at least one second wiring; power pins of any two adjacent gate drive chips are connected by the first wiring, each of the second wirings surrounds and passes through each of the gate drive chips, the first wirings connected with the power pin of the last gate drive chip in the previous group of the chip units and any of the second wirings, are parallelly connected with the power pin of the first gate drive chip in the next group of the chip units.

Display module having low difference in pixel luminance and display apparatus

A dual gate array substrate includes a plurality of groups of dual gate lines, a plurality of data lines, a plurality of pixel pairs and a plurality of common electrode lines, each common electrode line is arranged between two pixel units in a same pixel pair; and a layer where the common electrode line is located and a layer where a source/drain electrode of a thin film transistor is located are different layers and insulated from each other.

Dual gate array substrate and display panel

A liquid crystal display panel includes a first and second base substrates, a liquid crystal layer and an optical compensation layer. In the liquid crystal layer, a first alignment film is configured to anchor a part, proximate to the first alignment film, of second liquid crystal molecules, and a second alignment film is configured to anchor a part, proximate to the second alignment film, of the second liquid crystal molecules. In the optical compensation layer, a third alignment film is configured to anchor first liquid crystal molecules proximate to the third alignment film. A direction of orthogonal projections of long axes of the first liquid crystal molecules is parallel to a direction of orthogonal projections of long axes of second liquid crystal molecules anchored by the first and second alignment films. Rubbing directions of the first alignment film, the second alignment film and the third alignment film are the same.

Growing community of inventors

Beijing, China

Xibin Shao