Chongqing Boe Optoelectronics Technology Co., Ltd.

Boe Technology Group Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Beijing Boe Display Technology Co., Ltd.

Research Institute of Petroleum Processing, Sinopec

China Paeto-chemical Corporation

Xiaoyuan Wang

Wu Wang

Yan Fang

Yajie Bai

Ni Yang

Zhuo Xu

Ruilin Bi

Yunze Li

Yang Wang

Jaikwang Kim

Xun Pu

Jiandong Guo

Bin Wan

Zhongshan Wu

Junming Chen

Jiantao Liu

Kui Zhang

Zhijian Qi

Guodong Yang

Shengxue Wu

Rui Wang

Fei Shang

Seungmin Lee

Shaoru Li

Zhicai Xu

Hengyi Xu

Yuanyuan Zhu

Wenlong Feng

Zhicheng Fan

Hui Li

Dong Wang

Hongmei Liu

Ying Li

Zhihua Sun

Li Tian

Xiaofeng Yin

Qiujie Su

Yujie Gao

Jingpeng Zhao

Junhui Wu

Jinfeng Wang

Ping Gao

Ming Deng

Mengqiu Liu

Zhongfei Dong

Xuefang Chen

Hongbo Ji

Qian Tan

Ruiqi Pan

Dan Lei

Guangdi Cao

Longxiu Dai

Qiwei Duan

Jinqiang Mo

Xiuqin Li

Jiuhua Chen

Meicun Jiang

A display substrate, including a plurality of gate lines and a plurality of data lines defining a plurality of pixel regions, where the plurality of pixel regions include a plurality of normal pixel regions and a plurality of redundant pixel regions at a periphery of the normal pixel regions; where each normal pixel region is provided with a first pixel electrode and a first transistor, each redundant pixel region is provided with a second pixel electrode and a second transistor, a gate of the first transistor is connected to a corresponding gate line, a source of the first transistor is connected to a corresponding data line, and a drain of the first transistor is connected to the first pixel electrode; and the second pixel electrode and the second transistor are insulated and spaced apart from each other.

Display substrate and display apparatus

Provided is an array substrate, having a plurality of sub-pixel regions. The array substrate includes: a substrate; a pixel electrode layer and a common electrode layer that are disposed on the substrate; and a plurality of common signal lines disposed on the substrate. The plurality of common signal lines are insulated from the pixel electrode layer and electrically connected to the common electrode layer. An overlapped region is present between an orthographic projection of the common signal lines on the substrate and an orthographic projection of the pixel electrode layer on the substrate. The common signal lines have a plurality of electrode structures, wherein different electrode structures of the plurality of electrodes structures are disposed in different sub-pixel regions, and the plurality of electrode structures include a lap electrode lapped to the common electrode layer and an auxiliary electrode not lapped to the common electrode layer.

Array substrate and display device

An array substrate, a manufacturing method thereof, a display device, and a mask are provided. The array substrate includes a base substrate; a first conductive layer located on the base substrate; and an organic layer located on a side of the first conductive layer away from the base substrate, the peripheral region includes at least one bonding region, in each bonding region, the first conductive layer includes multiple wires arranged at intervals, the organic layer includes a first opening exposing the wires, the first opening includes an edge intersected with an extension direction of each wires, and the organic layer further includes a zigzag-shaped groove connected with the edge; in a direction perpendicular to the base substrate, a depth of the zigzag-shaped groove is less than a thickness of the organic layer, an orthographic projection of the zigzag-shaped groove on a plane parallel with the base substrate is zigzag-shaped.

Array substrate and manufacturing method thereof, display device, and mask

A touch display substrate, an integrated circuit chip and a display device are disclosed. The touch display substrate with an active area and a lead area arranged in sequence includes: a plurality of touch lines arranged in the active area; a plurality of touch leads in one-to-one correspondence with the plurality of touch lines; a plurality of touch electrodes arranged in an array in the active area, each of the touch electrodes is coupled to one of the touch lines; at least two of every three adjacent touch electrodes are connected to different multiplexers through coupled touch lines and touch leads.

Touch display substrate, integrated circuit chip and display device

A display panel, a circuit board and a display device are provided. The display panel includes a first pad region including a first pad connected to a first integrated circuit, a second pad region including a second pad electrically connected to a second integrated circuit, a third pad region including third pads electrically connected to a circuit board and a common signal line electrically connected to the common electrode of the sub-pixel. The display panel further includes a first signal line and a second signal line, the first pad is electrically connected to the third pad through the first signal line, the second pad is electrically connected to the third pad through the second signal line; the first signal line and the second signal line are electrically connected to each other through the third pads and the circuit board.

Display panel, circuit board and display device

Provided are a display substrate, display panel and display device. The display substrate comprises: a base substrate, comprising a display area and a surrounding area comprising a gluing area; multiple signal lines; multiple fanout lines, connected to multiple signal lines in a one-to-one correspondence manner. The fanout lines comprise: a first fanout line, and a second fanout line located at the side of first fanout line away from the base substrate; at least in the gluing area, the orthographic projection of the second fanout line on the base substrate substantially overlaps that of the first fanout line on the base substrate; in part of the area outside the gluing area, the size of an overlapping area between orthographic projections of the second fanout line and first fanout line on the base substrate in the direction perpendicular to the extension direction of the fanout lines is smaller than a first preset threshold.

Display substrate, display panel, and display device

The array base plate includes: the plurality of touch units, wherein each of the touch units includes a plurality of sub-pixels arranged in an array; and each of the sub-pixels includes a first electrode; and a plurality of trace units, wherein each of the trace units includes a first electrode line and a second electrode line that at least partially intersect or overlap in a direction perpendicular to the substrate; the first electrode line includes at least one first parallel-connected part, and the second electrode line includes at least one second parallel-connected part; in each of the trace units, the first parallel-connected part of the first electrode line and the second parallel-connected part of the second electrode line are connected in parallel.

Array base plate and display panel

A display panel and a display device are disclosed. The display panel comprises an array substrate and spacers; the array substrate comprises a first substrate, gate lines, data lines, and multiple sub-pixel units; the first substrate is provided with multiple sub-pixel regions, first wiring regions each located between two adjacent rows of sub-pixel regions, and second wiring regions each located between two adjacent columns of sub-pixel regions and intersecting the first wiring regions; at least part of each sub-pixel unit is located on a sub-pixel region; the gate lines and the data lines are respectively located on the first wiring regions and the second wiring regions and are electrically connected to the sub-pixel units; the data lines and the gate lines are insulated from each other and intersect each other; each data line is provided with an alignment part.

Display panel and display device

Provided are an array substrate and a display apparatus thereof. The array substrate includes a display region and a binding region located at a side of the display region; the binding region includes a first conductive layer disposed on the substrate and a planarization layer disposed at a side of the first conductive layer away from the substrate. The binding region includes a binding zone and a vacancy zone alternately disposed along an edge of the display region, the first conductive layer includes a plurality of binding pins disposed in the binding zone, and the planarization layer is provided with first openings exposing the plurality of binding pins and covering the binding zone and the vacancy zone.

Array substrate comprising a binding region having a binding zone and a vacancy zone alternately disposed and display apparatus thereof

A driving circuit, a driving method, a display substrate and a display device are provided. The driving circuit includes a first node control circuit, a second node control circuit, a third node control circuit and an output circuit; the first node control circuit controls the potential of the first node; the second node control circuit controls the potential of the second node; the third node control circuit controls, under the control of the on-off control signal, the first node to be electrically connected to the third node or the first node to be electrically disconnected from the third node; the output circuit controls, under the control of the potential of the second node and the potential of the third node, output of the driving signal through the driving signal terminal.

Driving circuit, driving method, display substrate and display device with node control circuit for controlling potential of node

The present invention relates to a touch substrate with a touch control unit including a first touch electrode having a first bus bar extending along a first direction and a first inner electrode extending from the first bus bar, and a second touch electrode having a second bus bar extending along the first direction and a second inner electrode extending from the second bus bar. The first and second bus bars are disposed opposite to each other, the first and second inner electrodes are between the first and second bus bars, alternately and spaced apart from each other in the first direction. Each pair of adjacent first and second inner electrodes constitutes an inner electrode group, within which, at least a portion of the first inner electrode extends toward the second inner electrode, and at least a portion of the second inner electrode extends toward the first inner electrode.

Touch substrate and touch device

Embodiments of the present disclosure provides an array substrate and a manufacturing method thereof, a display panel. The array substrate includes: a base (); a pixel electrode () and a thin film transistor disposed on the base (); a passivation layer () covering the thin film transistor and the pixel electrode (), the passivation layer () being provided with a transferring through hole (K, K) that simultaneously exposes the pixel electrode () and a drain electrode () or a source electrode () of the thin film transistor; a connection electrode () disposed on the passivation layer () and at the transferring through hole (K, K), the connection electrode () connected with the pixel electrode (), and the drain electrode () or the source electrode () through the transferring through hole (K, K). The present disclosure realizes a connection between the drain electrode () or the source electrode () and the pixel electrode () by using one transferring through hole (K, K), which effectively reduces the number of through holes, increases an aperture ratio of the display panel, improves product quality and yield.

Array substrate and manufacturing method thereof, display panel

A display substrate is provided, including: a base substrate; a display area, and a peripheral area surrounding the display area on the base substrate, where a dummy pixel unit and a dummy data line are located in the peripheral area. The dummy pixel unit includes a thin film transistor including a first electrode and a second electrode. The first electrode is one of a source electrode and a drain electrode and is electrically connected to the dummy data line, and the second electrode is another of the source electrode and the drain electrode and includes a first portion and a second portion separated by a first opening. A display panel including the display substrate and an electronic device including the display substrate or the display panel are further provided.

Display substrate having dummy pixel, display panel, and electronic device

Embodiments of the present disclosure provides an array substrate and a manufacturing method thereof, a display panel. The array substrate includes: a base; a pixel electrode and a thin film transistor disposed on the base; a passivation layer covering the thin film transistor and the pixel electrode, the passivation layer being provided with a transferring through hole that simultaneously exposes the pixel electrode and a drain electrode or a source electrode of the thin film transistor; a connection electrode disposed on the passivation layer and at the transferring through hole, the connection electrode connected with the pixel electrode, and the drain electrode or the source electrode through the transferring through hole.

A display panel is provided. The display panel includes at least one transistor of a split structure. The transistor of the split structure comprises a control electrode, a first electrode and a second electrode; the first electrode comprises N first electrode portions, the second electrode comprises N second electrode portions, and N is an integer greater than 2; the N first electrode portions are electrically coupled, and the N second electrode portions are electrically coupled; the display panel has a plurality of transistor regions arranged at intervals, an n-th first electrode portion and an n-th second electrode portion are located in a same transistor region, an m-th first electrode portion and an (m+1)-th first electrode portion are respectively located in two adjacent transistor regions, n and in are an positive integers, n is less than or equal to N, and in is less than or equal to N&#x2212;1.

Display device having a shift register having interdigital transistor

Growing community of inventors

Beijing, China

Xiaoyuan Wang