Nxp B.v.

Nxp Usa, Inc.

Xiaoqun Liu

Siamak Delshadpour

Madan Mohan Reddy Vemula

Xu Zhang

Kenneth Jaramillo

Mohammad Nizam Kabir

Ahmad Yazdi

Xueyang Geng

Steven Daniel

Soon-Gil Jung

Embodiments of equalizers are disclosed. In an embodiment, an equalizer includes a first signal path segment that includes a first plurality of serially connected transistors and current sources, a second signal path segment that includes a second plurality of serially connected transistors and current sources, and at least one termination resistor connected to the first and second signal path segments. The first plurality of serially connected transistors and current sources includes a first current source and a second current source connectable to a reference voltage and a first transistor and a second transistor connected between input terminals of the equalizer and the first and second current sources, where the first signal path segment further includes at least one resistor connected between the first and second current sources.

Two-dimensional high-speed equalizer with programmable direct current (DC) and peaking gains

One example discloses a level-shifter circuit, comprising: a pre-driver stage configured to receive differential inputs and generate differential pre-driver outputs; a first output stage coupled to receive the differential pre-driver outputs and generate a single-ended first stage output; a second output stage coupled to receive the differential pre-driver outputs and generate a single-ended second stage output; and wherein the first and second stage outputs together form a differential output.

Level-shifter

One example discloses a signal driver circuit, including: an input configured to receive an input signal; an output configured to transmit an output signal; a low drop-out voltage regulator (LDO) having a regulated voltage output; a set of voltage-modulated amplifiers having a first input coupled to the regulated voltage output, and a second input configured to receive the input signal; wherein the voltage-modulated amplifier is configured to amplify the input signal and transmit an amplified input signal on the output of the signal driver circuit; a de-emphasis controller, including a set of de-emphasis levels; wherein the de-emphasis controller is configured to selectively switch-on a first subset of the set of voltage-modulated amplifiers and switch-off a second subset of the set of voltage-modulated amplifiers based on the de-emphasis levels.

Signal driver circuit

One example discloses a differential-signal-detection circuit, comprising: an input stage configured to receive a differential input signal and to output a first differential output signal and a second differential output signal; a first comparator coupled to receive the first differential output signal and generate a first comparator output signal; a second comparator coupled to receive the second differential output signal and generate a second comparator output signal; and an output stage configured to receive the first and second comparator output signals and generate a differential-signal-detection signal.

Differential-signal-detection circuit

Various embodiments relate to a skew detector circuit, including: a logic circuit having two inputs configured to generate a logic 1 output when the two inputs have a logic 0 value and generator a logic 0 output when the two input have a logic 1 value; a first level shifter configured to increase the output of the logic circuit to a higher voltage; a second level shifter configured to increase the output of the first level shifter to a higher voltage; and a voltage regulator configured to produce a first voltage for the logic circuit, a second voltage for the first level shifter, and a third voltage for the second level shift.

Skew detection system and method to remove unwanted noise due to skewed signals

Various embodiments relate to an amplitude shift keying (ASK) demodulator for demodulating an input signal, including: a frequency filter configured to receive the input signal, wherein the frequency filter includes adjustable components configured to adjust the frequency response of the frequency filter; a rectifier configured to rectify an output of the frequency filter, wherein the rectifier includes an adjustable current source configured to adjust the current consumption of the rectifier; a reference signal generator configured to produce a reference signal; a current to voltage converter configured to convert the current of the rectified signal to a rectified voltage and to convert the current of the reference signal to a reference voltage; and a comparator configured to compare the rectified voltage to the reference voltage and to produce a demodulated output signal.

Programmable ask demodulator

A low dropout regulator includes a first stage that generate a first output voltage and a second stage that generates a second output voltage different from the first output voltage. The first stage and the second stage are coupled in parallel to a node, the stages are selectively controlled respective first and second output signals based on different conditions. One condition may be operation of a load in one or more predetermined modes. Another condition may be transition between modes. Selective control of the first stage during a mode transition may reduce voltage undershoot or voltage overshoot in the load.

Parallel low dropout regulator

One example discloses a differential-signal-detection circuit, including: an input stage configured to receive a differential input signal and to output a first differential output signal and a second differential output signal; a first comparator coupled to receive both the first differential output signal and the second differential output signal, and in response generate a first comparator output signal; a second comparator coupled to receive both the first differential output signal and the second differential output signal and generate a second comparator output signal; and an output stage configured to receive the first and second comparator output signals and generate a differential-signal-detection signal; wherein the output stage includes a deglitch circuit configured to attenuate changes in the differential-signal-detection signal during an inter-symbol period of the differential input signal.

Deglitch circuit for a differential-signal-detection circuit

An over-voltage tolerant test bus for an integrated circuit (IC) is disclosed. The over-voltage tolerant test bus includes a first switch to be coupled to a test pin of the IC and a second switch to be coupled to an internal module of the IC. The second switch is coupled to the first switch in series. The over-voltage tolerant test bus also includes a protection circuit coupled between the first switch and the second switch and a supply voltage to keep a voltage between a source and a drain of the first switch substantially equal to a difference between a voltage at the test pin and the supply voltage.

Over-voltage tolerant analog test bus

Embodiments of overvoltage protection devices and a method for operating an overvoltage protection device are disclosed. In an embodiment, an overvoltage protection device includes a switch circuit connected between an input terminal from which an input voltage is received and an output terminal from which an output voltage is output and including multiple NMOS transistors and multiple PMOS transistors connected in series between the input terminal and the output terminal, a first voltage generation circuit configured to, generate a first voltage that is applied to the NMOS transistors and a second voltage that is applied to a body of each of the PMOS transistors, in response to the input voltage and a supply voltage, and a second voltage generation circuit configured to generate a third voltage that is applied to the PMOS transistors in response to the input voltage and the first voltage.

Overvoltage protection device and a method for operating an overvoltage protection device

A power switch over current protection system including a power switch transistor configured to deliver a power current from a power source to power load, a power switch driver configured to control and on/off state of the power switch, an over current protection (OCP) circuit to detect a threshold value of the power current, a discharge transistor configured to discharge a parasitic capacitance of the power switch transistor, and a system state machine to receive a signal from the OCP circuit configured to control an action of the power switch driver and discharge transistor depending on the level of the power current.

Power switch over current protection system

A multi-stage charge pump including a first stage configured to generate a first output voltage, a last stage configured to receive the first output voltage from the first stage and output a second output voltage, a switch configured to receive the second output voltage from the last stage, and a voltage regulator circuit configured to control the second output voltage of the last stage to maintain a substantially constant on-resistance of the switch.

Multi-stage charge pump regulation architecture

A multi-stage charge pump circuit including a first stage of the multi-stage charge pump having a first voltage output, a last stage of the multi-stage charge pump having a first voltage input, and an inter-stage limitation circuit configured to protect a voltage drop of the first voltage output of the first stage of the multi-stage charge pump when there is a voltage drop on the first voltage input of the last stage of the multi-stage charge pump.

Multi-stage charge pump with inter-stage limitation circuit

A signal detector includes an input to receive a differential signal, a generator to generate a first voltage based on the differential signal and a second voltage based on the first voltage and a predetermined voltage, and an output stage to output a detection signal based on the first voltage and the second voltage. The differential signal includes a first signal and a second signal. The detection signal has a first value when a difference between the first and second signals is in a first range and a second value when the difference between the first and second signals is in a second range. The detection signal may indicate the presence or absence of low frequency periodic signaling for the differential signal. Such a detector may demonstrate fast response and operate at low-current.

Signal detector

An electronic circuit, including an equalizer circuit to input a differential signal, a rectifier circuit to receive the differential signal and output a first current and a second current, a replica circuit to receive a differential threshold signal and output a third current and a fourth current to compensate for PVT variations in the first and second currents, and a comparator circuit configured to compare a differential voltage generated based on the first, second, third, and fourth currents to determine a loss of signal event of the electronic circuit.

Growing community of inventors

Chandler, AZ, United States of America

Xiaoqun Liu