Fujian Jinhua Integrated Circuit Co., Ltd.

Xiaopei Fang

Yu-Cheng Tung

Yi-Wang Jhan

Gang-Yi Lin

Yifei Yan

Xin You

Yung-Tai Huang

Shaoyi Wu

Yi-Lei Tseng

Congcong Wang

A semiconductor structure includes a substrate, a first dielectric layer on the substrate, a second dielectric layer on the first dielectric layer, and an interconnection structure on the second dielectric layer. The interconnection structure includes at least two lateral extending portions on the second dielectric layer, and a U-shaped portion through the second dielectric layer and a portion of the first dielectric layer and connected between adjacent ends of the two lateral extending portions.

Semiconductor structure and method for forming the same

A method for fabricating a semiconductor structure includes the following steps. Decomposing a layout to first connection patterns and second connection patterns alternatively arranged with each other, where a to-be-split pattern is disposed between the first connection pattern and the second connection pattern; splitting the to-be-split pattern into a cutting portion and a counterpart cutting portion; forming a first photomask having a layout constructed by the first connection pattern and the cutting portion; forming a second photomask having a layout constructed by the second connection pattern and the counterpart cutting portion; transferring layouts of the first and second photomasks to a target layer to form connection patterns and a merged pattern, where the contour of the merged pattern is defined by the cutting portion and the counterpart cutting portion, and each end surface of the merged pattern comprises a recessed region and a protruded region.

Semiconductor structure, method for fabricating thereof, and method for fabricating semiconductor layout

A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a plurality of gate conductive patterns on the substrate; an interlayer dielectric layer covering the gate conductive patterns on the substrate; an interconnect structure comprising a contact plug and a first contact pad, the contact plug extending through the interlayer dielectric layer to the substrate, the first contact pad fully covering a top of the contact plug and extending laterally over part of a top surface of the interlayer dielectric layer; and a second contact pad formed on the top surface of the interlayer dielectric layer and spaced apart from a side edge of the first contact pad, wherein the second contact pad is formed and fully overlays on the interlayer dielectric layer and an isolation plug is spaced apart from the first contact pad.

Semiconductor structure

A contact structure, contact pad layout and structure, mask combination and manufacturing method thereof is provided in the present invention. Through the connection of tops of at least two contact plugs in the boundary of core region, an integrated contact with larger cross-sectional area is formed in the boundary of core region. Accordingly, the process of forming electronic components on the contact structure in the boundary of core region may be provided with sufficient process window to increase the size of electronic components in the boundary, lower contact resistance, and the electronic component with increased size in the boundary buffer the density difference of circuit patterns between the core region and the peripheral region, thereby improving optical proximity effect and ensuring the uniformity of electronic components on the contact plugs inside the boundary of core region, and avoiding the collapse of electronic components on the contact plug in the boundary.

Contact structure, contact pad layout and structure, mask combination and manufacturing method thereof

A semiconductor structure, including a plurality of connection patterns disposed on the substrate, and a merged pattern disposed between adjacent two of the connection patterns, wherein the merged pattern includes a first outer line, a central line and a second outer line sequentially arranged along a first direction and connected with each other, and an end surface of the first outer line, an end surface of the central line and an end surface of the second outer line are misaligned along the first direction.

A semiconductor structure and a method of fabricating therefor are disclosed. A second contact pad () is arranged lateral to a first contact pad () in an interconnect structure (). As a result, during fabrication of the interconnect structure (), the first contact pad () will not be present alone in a large bland area, due to the presence of the second contact pad (). Thus, a pattern feature for the first contact pad () will not be over-resolved, increasing formation accuracy of the first contact pad () and thus guaranteeing good electrical transmission performance of the resulting interconnect structure ().

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Quanzhou, China

Xiaopei Fang