Boe Technology Group Co., Ltd.

Chengdu Boe Optoelectronics Technology Co., Ltd.

Boe Technology Group

Boe Technology Co., Ltd.

Chengdu Boe Optoelectronics Co., Ltd.

Xiaojing Qi

Wen Tan

Haigang Qing

Bo Wu

Quanguo Zhou

Xiaoxiang He

Like Hu

Weiyun Huang

Leisen Nie

Young Yik Ko

Tianma Li

Pengcheng Zang

Tingliang Liu

Yin Deng

Yun Qiu

Peng Zhou

Zhidong Wang

Youqiang Lu

Xiangdong Qin

Jing Wang

Benlian Wang

Feng Bai

Fan Li

Youngyik Ko

Lei Dai

Shan Gao

Dongmei Wei

Fucheng Yang

Bin Ji

Hao Luo

Haodi Liu

Benyin Ye

Xiaomei Huang

Yawen Zhu

Zhiqin Zhang

A dual-gate array substrate includes: a plurality of gate lines arranged in a first direction and each extended in a second direction that is perpendicular to the first direction; a plurality of primary signal lines and secondary signal lines arranged alternately in the second direction and extended in the first direction; and a plurality of pixel units. The primary signal lines are connected to a drive unit, and connected respectively to the pixel units that are adjacent thereto. Common electrodes include a plurality of main electrodes and a plurality of branching electrodes. An orthographic projection of the main electrode on the dual-gate array substrate does not overlap with those of corresponding ones, adjacent to the main electrode, of the pixel electrodes and at least covers the primary signal line. Each gate line includes a protrusion protruded in the first direction.

Dual-gate array substrate and display device

A display panel a display device are provided. The display panel includes a plurality of pixel units arranged in a row direction and in a column direction, the display panel includes a display region. An edge of the display region includes a fold line formed by connecting a line segment extending in the row direction and a line segment extending in the column direction, a parallelogram region formed in the display region taking two adjacent line segments as adjacent sides includes the pixel units; directions from an intersection point of the two adjacent line segments to end points of the two adjacent line segments other than those at the intersection point are a first direction and a second direction, respectively; in the parallelogram region, aperture ratios of the pixel units arranged in at least one of the first direction and the second direction increase gradually.

Display panel and display device

There are provided a display panel and a manufacturing method thereof. The display panel includes first and second display sub-panels with a gap region arranged therebetween; and a light-shielding layer at least located in the gap region, the first and second display sub-panels each include multiple pixel units arranged in an array, each pixel unit includes: a substrate; a data line on the substrate; a black matrix on a side of the data line away from the substrate, an orthographic projection of the data line on the substrate falls within that of the black matrix on the substrate, in at least one of the first and second display sub-panel, the black matrix of the pixel unit closest to the gap region and the light-shielding layer are arranged with an interval therebetween, the black matrix is located on a side of the light-shielding layer away from the gap region.

Display panel and method for manufacturing the same

A pixel structure and a manufacturing method therefor, an array substrate, and a display device are provided. The pixel structure includes a pixel electrode, an active layer, a source/drain electrode layer, and a common electrode which are located on a base substrate. The pixel electrode is located between the base substrate and the common electrode. The source/drain electrode layer includes a first electrode and a second electrode which are electrically connected to the active layer, and the second electrode is electrically connected to the pixel electrode. The active layer is located between the base substrate and the source/drain electrode layer. The active layer includes a first surface close to the source/drain electrode layer. The source/drain electrode layer includes a second surface close to the active layer. Partial edge of the first surface is aligned with partial edge of the second surface.

Pixel structure and manufacturing method therefor, array substrate, and display device

The present disclosure relates to a dual-gate array substrate and a display device. A dual-gate array substrate includes: a plurality of gate lines arranged in a first direction and each extended in a second direction that is perpendicular to the first direction; a plurality of primary signal lines and secondary signal lines arranged alternately in the second direction and extended in the first direction; and a plurality of pixel units. The primary signal lines are connected to a drive unit, and connected respectively to the pixel units that are adjacent thereto. Common electrodes include a plurality of main electrodes and a plurality of branching electrodes. An orthographic projection of the main electrode on the dual-gate array substrate does not overlap with those of corresponding ones, adjacent to the main electrode, of the pixel electrodes and at least covers the primary signal line.

Provided are a driving circuit and a driving method thereof, and a display device. The driving circuit includes a signal line, a control line, a driving unit, a power supply unit, a compensation unit, a light emitting control unit, a data writing unit, a storage unit, and an aging alleviation unit, wherein the driving unit is configured to drive a light emitting element; the light emitting control unit is configured to control the light emitting element to emit light; the data writing unit is configured to write the data signal into the storage unit; the compensation unit is configured to perform threshold voltage compensation for the driving unit; and the aging alleviation unit is configured to short-circuit a cathode and an anode of the light emitting element.

Driving circuit and driving method thereof, and display device

The present disclosure relates to a pixel driving circuit, a pixel driving method and a display device. A voltage related to a threshold voltage of a driving unit is stored in a storage unit during a compensation stage of the pixel driving circuit utilizing a charging control unit so that an operating current of the driving unit is not affected by the threshold voltage during a light emitting holding stage of the pixel driving circuit. Thus, the influence of the threshold voltage of the driving unit on an operating current thereof is eliminated and an issue in which the display luminance of the light emitting element is not uniform due to inconsistency in the threshold voltage is solved, which improves display quality of the display device.

Pixel driving circuits, pixel driving methods and display devices

A dual-gate array substrate includes: a plurality of gate lines arranged in a first direction; a plurality of primary signal lines and secondary signal lines arranged alternately and arrayed in a second direction; a plurality of pixel units being enclosed and defined by jointing adjacent two of the gate lines insulatively with the primary signal lines or the secondary signal lines, the primary signal lines being connected to a drive unit, and being connected respectively to the pixel units that are adjacent thereto. Common electrodes are further provided to include a plurality of main electrodes and a plurality of branching electrodes. The secondary signal lines are connected to the common electrodes, and an orthographic projection of the main electrode on the dual-gate array substrate has overlapping regions respectively with orthographic projections of corresponding ones, adjacent to the main electrode, of the pixel electrodes on the dual-gate array substrate and at least covers the primary signal line.

The present disclosure provides an array substrate, a fabrication method thereof, and a display device. The array substrate includes a base substrate, a thin film transistor over the base substrate, a first common electrode over the base substrate, a pixel electrode over the first common electrode and being electrically insulated from the first common electrode, and a second common electrode disposed over the pixel electrode and being electrically insulated from the pixel electrode. The pixel electrode is electrically connected to a drain electrode of the thin film transistor.

Array substrate, fabrication method thereof and display device

The embodiments of the present disclosure provide a shift register unit, a gate driving circuit with bi-directional scan, and a display apparatus. The shift register unit comprises: an input module configured to provide a first input signal to a first node; a first control module configured to provide a pull-up output based on the first input signal and the third clock signal, and then provide a pull-down output; and a second control module configured to maintain a level at the output node at the source voltage based on a fourth clock signal. The first control module comprises a first transistor that remains on after the pull-up output to provide the pull-down output, and the second control module comprises a second transistor that maintains the level at the output node. The shift register unit according to the embodiment of the present disclosure achieves bi-directional scan with a simple design, which is beneficial for wiring in display panels with narrow rims and high resolutions. Further, since the second transistor is provided only for pull-down maintenance, a transistor of a small size can be used to further reduce the size of the circuit.

Shift register unit, gate driving circuit and display apparatus

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Beijing, China

Xiaojing Qi