Samsung Electronics Co., Ltd.

Xiaohua Yu

Siu-Chuang Ivan Lu

Sang Won Son

Tienyu Chang

Amitoj Singh

Ajaypat Jain

Ying Chen

Sangwon Son

Che-Chun Kuo

Jianxin Wu

Naveen Alluri

Wei-Hsuan Sharon Kung

Methods and apparatuses are provided in which a level shifter of a digital control circuit for a switchable voltage supply circuit shifts a domain level of a first input. A first inverter of the digital control circuit inverts output of the first level shifter to output a first gain voltage to turn on a first switch of the switchable voltage supply circuit or output a second gain voltage to turn off the first switch. A second inverter of the digital control circuit inverts a second input to output a third gain voltage to turn on a second switch of the switchable voltage supply circuit or output a fourth gain voltage to turn off the second switch. The first gain voltage is greater than the third gain voltage.

Methods and devices for compact voltage supply switching

Disclosed is a millimeter-wave transceiver (TRX) interface including a transmitter (TX) front-end, a receiver (RX) front-end, a TX/RX switch disposed in series between the TX front-end and the RX front-end, a TX output transformer disposed between the TX front-end and an input of the TX/RX switch, a first capacitor, and at least two diodes, wherein the first capacitor and the at least two diodes are connected between the TX output transformer and ground.

High frequency transmitter and receiver radio frequency interface including transmit/receive switch with electrostatic discharge protection and biasing schemes

A wide band matching network for power amplifier impedance matching, the wide band matching network comprising: a power amplifier transistor connected to an output network; the output network including: a series capacitor; an on-chip transformer connected to the capacitor in series, wherein the transformer and the capacitor act as a second order filter; and a port connected to the capacitor and a receiver switch.

24 to 30GHZ wide band CMOS power amplifier with turn-off mode high impedance

A communication device, including a plurality of transceiver modules; a storage configured to store calibration information; and at least one processor configured to: generate a first dual-polarized RF signal by controlling a first transceiver module to generate a first RF signal based on the calibration information; measure, by a second transceiver module, a first signal power of the first dual-polarized RF signal; adjust a parameter of the first transceiver module, and generate a second dual-polarized RF signal by controlling the first transceiver module to generate a second RF signal based on the adjusted parameter; measure, by the second transceiver module, a second signal power of the second dual-polarized RF signal; and generate an aligned dual-polarized RF signal by controlling the plurality of transceiver modules to generate a plurality of RF signals based on a result of a comparison between the first signal power and the second signal power.

Method of synchronizing the H and V phase in a dual-polarized phased array system

A band-switching network includes a dual-band balun and a switch network. The dual-band balun includes a first output and a second output. The switch network includes a first switch and a second switch in which an input to the first switch is coupled to the first output and an input to the second switch is coupled to the second balanced output. The dual-band balun further includes a primary coil, a first secondary coil and a second secondary coil in which the first secondary coil is coupled to the first balanced output and the second secondary coil is coupled to the second balanced output. In one embodiment, the primary coil and the first secondary coil are coupled by a first coupling factor k, and the primary coil and the second secondary coil are coupled by a second coupling factor kthat is different from the first coupling factor k.

Band switching balun

24 to 30GHz wide band CMOS power amplifier with turn-off mode high impedance

An electronic circuit and method are provided. The electronic circuit includes an in-phase (I)-quadrature (Q) amplifier including an I cascode branch and a Q cascode branch, the IQ amplifier configured to receive a differential input and control signals, control, based on the control signals, gate voltages in the I cascode branch and gate voltages in the Q cascode branch, generate an I output signal with the I cascode branch, and generate a Q output signal with the Q cascode branch, and a quadrature coupler configured to perform quadrature summation of the I output signal and the Q output signal and generate a final phase shifted output.

Method and circuit for power consumption reduction in active phase shifters

A low noise amplifier for carrier aggregation and non-carrier aggregation is provided. The low noise amplifier includes a plurality of symmetrical half circuits, a plurality of bias circuits, where each of the plurality of bias circuits is connected to one of the plurality of symmetrical half circuits, a plurality of capacitors, where each of the plurality of capacitors is connected to one of the plurality of symmetrical half circuits for Alternating Current (AC) coupling an RF signal containing at least one component carrier, and a control logic circuit connected to each of the plurality of symmetrical half circuits for configuring the low noise amplifier to process one component carrier or a plurality of component carriers.

Growing community of inventors

San Jose, CA, United States of America

Xiaohua Yu