Xilinx, Inc.

Texas Instruments Corporation

Xiaohan Chen

Hongzhi Zhao

Hemang Parekh

Christopher H Dick

Zigang Yang

Hardik Prakash Gandhi

Lars Jorgensen

Vincent C Barnes

Raul Blazquez

Jie Yang

Xing Zhao

John Edward Mcgrath

David L Brubaker

Christophe Erdmann

Vince C Barnes

David Eugene Melinn

Embodiments herein describe a PIM correction circuit. In a base station, TX and RX RF changes, band pass filters, duplexers, and diplexers can have severe memory effects due to their sharp transition bandwidth from pass band to stop band. PIM interference, generated by the TX signals and reflected onto the RX RF chain will include these memory effects. These memory effects make PIM cancellation complex, requiring complicated computations and circuits. However, the embodiments herein use a PIM correction circuit that separates the memory effects of the TX and RX paths from the memory effects of PIM, thereby reducing PIM cancellation complexity and hardware implementation cost.

PIM cancellation architecture

A digital predistortion (DPD) system includes an input configured to receive an input signal. In some examples, a first signal path configured to generate a first signal based on the input signal. In some examples, an error model provider configured to generate an error model signal modeled after a gate bias error voltage associated with the DPD system. In some examples, a first combiner configured to combine the first signal and the error model signal to generate a first intermediate signal, and the DPD system generates an output signal based at least on the first intermediate signal.

Systems and methods for digital predistortion to mitigate power amplifier bias circuit effects

A transmitter for a communication system comprises a digital pre-distortion (DPD) circuit and adaptation circuitry. The DPD circuit is configured to generate a digital intermediate signal by compensating an input signal for distortions resulting from an amplifier. The amplifier is configured to output an output signal based on the digital intermediate signal. The DPD circuit includes one or more an infinite impulse response (IIR) filters configured to implement a first transfer function based on a first parameter, and a second transfer function based on the first parameter and a time constant. The DPD circuit is configured to generate an adjustment signal based on the first transfer function and the second transfer function. The adaptation circuitry is configured to update the first parameter based on the adjustment signal, the input signal, and the output signal.

Time constant tracking for digital pre-distortion

Examples described herein provide a radio frequency circuit. The radio frequency circuit includes a controller; a parameter estimator circuit; a capture circuit; and a pre-distorter circuit. The pre-distorter generally includes one or more nonlinear filter circuits and configurable hardware circuitry. Each of the one or more the nonlinear filter circuits includes: adder(s); multiplier(s); and memories coupled to at least one of the adder(s) and the multiplier(s); where the configurable hardware circuitry is configured to distort one or more input signals by directing the one or more input signals along a path through the one or more adders, the one or more multipliers, and the one or more memories and by distorting the one or input signals using the nonlinear parameters stored in the one or more memories as the one or more input signals travels the path.

Reconfigurable and scalable nonlinear filter for digital pre-distorters

Described examples provide for digital communication circuits and systems that implement digital pre-distortion (DPD). In an example, a system includes a DPD circuit configured to compensate an input signal for distortions resulting from an amplifier. The DPD circuit includes an infinite impulse response (IIR) filter configured to implement a transfer function. The IIR filter includes a selection circuit configured to selectively output a selected parameter. The transfer function is based on the selected parameter.

Digital communications circuits and systems

A transmitter for a communication system comprises a digital pre-distortion (DPD) circuit configured to generate a digital intermediate signal by compensating an input signal for distortions resulting from an amplifier, and an adaptation circuitry configured to update the first parameter based on the adjustment signal, the input signal, and an output signal output by the amplifier and based on the digital intermediate signal. The DPD circuit includes an infinite impulse response filter configured to implement a transfer function based on a first parameter, and thermal tracking circuitry configured to generate an adjustment signal corresponding to a thermal change of the amplifier.

Thermal effect mitigation for digital pre-distortion

A transmit circuit operated with time-interpolated digital pre-distortion (DPD) coefficients to improve adjacent channel power ratio (ACPR) performance during a power mode change is provided. The transmit circuit includes a DPD circuit configured to operate with a first DPD coefficient according to a first transmit power level of a transmit power amplifier of the transmit circuit. The transmit circuit further includes a DPD coefficient management engine configured to retrieve a second DPD coefficient corresponding to the second transmit power level. The transmit circuit further includes a DPD coefficient time-interpolation engine configured to compute a set of time-interpolated DPD coefficients corresponding to a set of time instants for a transient period when the transmit power amplifier is adapted to the second DPD coefficient.

System and method for time-interpolated power change in a digital pre-distortion circuit

A digital predistortion (DPD) system includes an input configured to receive a DPD input signal. In some embodiments, a non-linear datapath is coupled to the input, where the non-linear datapath includes a plurality of parallel datapath elements each coupled to the input. By way of example, each of the plurality of parallel datapath elements is configured to add a different inverse non-linear component to the DPD input signal corresponding to a non-linear component of an amplifier. In various examples, a first combiner combines an output of each of the plurality of datapath elements to generate a first predistortion signal. In some embodiments, the DPD system further includes a linear datapath coupled to the input in parallel with the non-linear datapath to generate a second predistortion signal. In addition, a second combiner combines the first predistortion signal and the second predistortion signal to generate a DPD output signal.

Method of and circuit for predistortion for a cable TV amplifier

A digital predistortion (DPD) system includes an input configured to receive a DPD input signal. In some examples, a non-linear datapath is coupled to the input, where the non-linear datapath is configured to add a non-linear mirror image component to the DPD input signal to provide a non-linear signal that is used to generate a first predistortion signal. In some embodiments, a linear datapath is coupled to the input in parallel with the non-linear datapath to generate a second predistortion signal. A first combiner is configured to combine the first predistortion signal and the second predistortion signal to generate a DPD output signal.

Described examples provide for digital communication circuits and systems that implement digital pre-distortion (DPD). In an example, a circuit includes a baseband DPD circuit, up-conversion circuitry, and feedback circuitry. The baseband DPD circuit comprises a baseband signal path and pre-distortion path. The pre-distortion path is configured to generate a pre-distortion signal based on the baseband signal. The baseband DPD circuit includes a first adder configured to add the baseband signal from the baseband signal path and the pre-distortion signal from the pre-distortion path to generate a pre-distorted baseband signal. The up-conversion circuitry is configured to convert the pre-distorted baseband signal to a radio frequency signal. The up-conversion circuitry is configured to be coupled to an input of a cable television (CATV) amplifier. The feedback circuitry comprises a DPD engine configured to determine a configuration of the pre-distortion path based on an output signal on the output of the CATV amplifier.

A crest factor reduction (CFR) system includes a digital tilt filter coupled to an input of the CFR system. In some embodiments, the digital tilt filter is configured to receive a system input signal and generate a digital tilt filter output signal at a digital tilt filter output. In some examples, the CFR system further includes a CFR module coupled to the digital tilt filter output, where the CFR module is configured receive the digital tilt filter output signal and perform a CFR process to the digital tilt filter output signal to generate a CFR module output signal at a CFR module output. In addition, the CFR system may include a digital tilt equalizer coupled to the CFR module output, where the digital tilt equalizer is configured to receive the CFR module output signal and generate a system output signal.

Method of and circuit for crest factor reduction for a cable TV amplifier

A digital pre-distortion component includes: a first capturing component that captures a first sample set of data; a first generating component that generates a first change matrix associated with a portion of the first sample set of data; a first memory component that stores the first change matrix; a second capturing component that captures a second sample set of data; a second generating component that generates a second change matrix associated with a portion of the second sample set of data; a second memory component that stores the second change matrix; a third capturing component that captures a third sample set of data; a third generating component that generates a third change matrix associated with a portion of the third sample set of data; a comparing component that compares the third change matrix with the first change matrix to obtain a first comparison, and compares the third change matrix with the second change matrix to obtain a second comparison; and an adapting component that adapts the digital pre-distortion component with the third sample set of data based on one of the first comparison and the second comparison.

Capture selection for digital pre-distortion adaptation and capture concatenation for frequency hopping pre-distortion adaptation

Example embodiment of the systems and methods of linear impairment modeling to improve digital pre-distortion adaptation performance includes a DPD module that is modified during each sample by a DPD adaptation engine. A linear impairment modeling module separates the linear and non-linear errors introduced in the power amplifier. The linear impairment model is adjusted during each sample using inputs from the input signal and from a FB post processing module. The linear impairment modeling module removes the linear errors such that the DPD adaptation engine only adapts the DPD module based on the non-linear errors. This increases system stability and allows for the correction of IQ imbalance inside the linear impairment modeling, simplifying the feedback post-processing.

Subtracting linear impairments for non-linear impairment digital pre-distortion error signal

A method of predistorting an input signal () for an amplifier is disclosed (FIG.). The method includes predistorting the input signal with a first set of parameters (FDPD) and a second set of parameters (CDPD) at a first time (). The first set of parameters is updated at a second time (). The second set of parameters is updated separately from the first set of parameters at a third time ().

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Sunnyvale, CA, United States of America

Xiaohan Chen