Beijing Boe Optoelectronics Technology Co., Ltd.

Boe Technology Group Co., Ltd.

Xiaoguang Pei

Haisheng Zhao

Chong Liu

Zhilong Peng

Zhilian Xiao

Hongxi Xiao

Zijin Lin

Wei Wang

Haitao Ma

Dongjiang Sun

Yu Cao

Huanping Liu

Jiapeng Li

Chaoyang Deng

Huigang Jiang

The embodiments of the present disclosure provide a photoelectric detector, a method for manufacturing the photoelectric detector, and a detection device. The method for manufacturing the photoelectric detector includes: forming a thin film transistor array layer on a base substrate; forming an organic layer on a side of the thin film transistor array layer facing away from the base substrate; and patterning the organic layer to form a first via hole which enables a signal transmission layer in the thin film transistor array layer to be exposed; and depositing a photoelectric conversion device in the first via hole.

Photoelectric detector, manufacturing method thereof, and detection device

Disclosed are a backlight module, a display panel, and a display device. The backlight module includes a module frame and at least one first conductive tip structure disposed inside the module frame, the first conductive tip structure includes a first conductive tip, the first conductive tip being in an exposed state of being exposed out from the module frame. The backlight module, according to a point discharge principle, preferentially performs discharging on static electricity through the conductive tip structure, to provide a novel antistatic backlight module.

Backlight module, display panel and display device

An array substrate is disclosed, which includes a substrate, at least one test line, an insulating layer, and an electrostatic shielding pattern. The at least one test line is disposed over the substrate. The insulating layer is disposed over the at least one test line. The electrostatic shielding pattern is disposed over, and insulated by the insulating layer from, the at least one test line in the array substrate. The electrostatic shielding pattern is configured to absorb, and guide out from the array substrate, static electricity to thereby avoid the static electricity from entering an interior of the array substrate via the at least one test line. A method for manufacturing the array substrate, and a display panel containing the array substrate are also provided in the disclosure.

Array substrate and manufacturing method, and display panel

Embodiments of the present disclosure relate to a three-dimensional touch sensing method, a three-dimensional display device and a wearable device. The three-dimensional touch sensing method, comprising: receiving an electron beam being perpendicularly incident to a preset plane on the preset plane, the electron beam having a preset emission intensity; obtaining a reception position and a reception intensity of the electron beam; determining a projection position of a touch position on the preset plane according to the reception position of the electron beam; and calculating a distance from the touch position to the preset plane according to the reception intensity of the electron beam and the preset emission intensity.

Three-dimensional touch sensing method, three-dimensional display device and wearable device

An array substrate, a method for fabricating the same, a display panel and a display device are disclosed. The array substrate comprises leading wires, the plurality of leading wires form a plurality of grooves in a fanout area of the array substrate, the plurality of grooves are filled with a filler, and the filler filled in the grooves has an upper surface which is flush with leading wires surrounding the grooves. The filler is made from an insulating and transparent material.

Array substrate and method for fabricating the same, display panel and display device

An array substrate includes a substrate, a first signal line and a second signal line on the substrate, an insulating layer covering the first signal line and the second signal line, and a groove penetrating through the insulating layer. The first signal line and the second signal line are arranged in a same layer and separated from each other. The groove is between the first signal line and the second signal line.

Array substrate, fabrication method and display device

A method of manufacturing an array substrate assembly and an array substrate assembly manufactured by the method are disclosed. The method includes: manufacturing a gate metal layer on a substrate, the gate metal layer including a gate line and a common electrode signal line spaced from each other; forming a gate insulating layer, an active layer, a source-drain electrode layer, a passivation layer, and a protective pattern on the gate metal layer; and forming, in the passivation layer and the gate insulating layer, a via hole configured for a connection to the common electrode signal line. An orthogonal projection of the protective pattern on the substrate and an orthogonal projection of the via hole on the substrate partly coincide with each other, and the orthogonal projection of the protective pattern on the substrate and an orthogonal projection of the gate line on the substrate partly coincide with each other.

Array substrate assembly and method of manufacturing the same

A method for manufacturing thin film transistor, a method for manufacturing array substrate, an array substrate and a display device are provided. The method for manufacturing thin film transistor includes forming an intermediate layer on a substrate, patterning the intermediate layer to form an intermediate layer reserved region and an intermediate layer unreserved region, where the intermediate layer unreserved region corresponds to a pattern of a first structure layer, forming, on the substrate with a pattern of the intermediate layer, a material layer from which the first structure layer is formed, and removing the intermediate layer, and forming the pattern of the first structure layer through a portion of the material layer remaining on the substrate.

Method for manufacturing thin film transistor, method for manufacturing array substrate, array substrate and display device

The present disclosure relates to an image calibrating method and device of a testing apparatus for thin film transistor (TFT) substrate. The method comprises following steps of: calculating an image offset value by using coordinate information of each pixel in a prescribed target image obtained by the testing apparatus for the thin film transistor substrate; and determining whether the offset value is smaller than a prescribed threshold value, in a case where the offset value is not smaller than the prescribed threshold value, adjusting the image by using the offset value and recalculating the offset value by using the coordinate information of each pixel in the adjusted image; in a case where the offset value is smaller than the prescribed threshold value, calibrating the image obtained by the testing apparatus for the thin film transistor substrate with the offset value as a calibrating value. The calibrating efficiency and calibrating accuracy of the testing method for the thin film transistor substrate are enhanced according to the present disclosure.

Image calibrating method and device of testing apparatus for thin film transistor substrate

A method for manufacturing an array substrate, including: forming a plurality of first metal layer patterns on a base substrate which are independent from each other, each of the plurality of first metal layer patterns including an end at a non-display region of the array substrate; forming an insulating layer on the plurality of first metal layer patterns; and forming a semiconductor pattern on the insulating layer, a portion of semiconductor pattern is disposed directly opposite to the end of the first metal layer patterns.

Array substrate and manufacturing method thereof, display panel and display device

Embodiments of the present invention provide a LCD Q-Panel, a LCD panel and a LCD apparatus, for solving the technical problem that there is a large loss of a signal over the resistance of the signal transmission line when the signal is loaded into a general signal connection port of the LCD Q-Panel in the prior art. The LCD Q-Panel provided in embodiments of the present invention comprises: a general signal connection port, at least one LCD panel comprising a signal connection point, and at least one voltage follower; the signal input from the general signal connection port is transmitted via the at least one voltage follower to the signal connection point connected to an output terminal of the at least one voltage follower and the LCD panel comprising the signal connection point.

Liquid crystal display (LCD) Q-panel, LCD panel and LCD apparatus

The present invention provides an array substrate, a display device, and a mother board. One or more short-circuit rings are each arranged at an end of a corresponding signal line and connected to the corresponding signal line, and the short-circuit rings are serially connected through a common electrode line. The array substrate is added with a test line and a testing terminal pad, the testing terminal pad is connected to the common electrode line via the test line and is configured to apply a negative voltage onto the common electrode line connected to the test line while testing the signal line.

Array substrate, display device and mother board

The present disclosure provides a method for forming a thin film pattern. The method includes steps of: forming a mask pattern on a thin film in such a manner that the mask pattern includes a reserved portion corresponding to a region where the thin film pattern to be formed is located, and a partially-reserved portion neighboring the reserved portion; performing a wet-etching process to etch off a portion of the thin film which is not covered by the mask pattern; performing a dry etching process to remove the partially-reserved portion and thin the reserved portion; and performing a dry etching process to etch off a portion of the thin film which is not covered by the remaining mask pattern, so as to form the thin film pattern.

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Beijing, China

Xiaoguang Pei