Apple Inc.

Micron Technology Incorporated

Aptina Imaging Corporation

Xiaofeng Fan

Xiangli Li

Weiping Li

Zhiping Yin

Chung Chun Wan

Richard A Mauritzson

Michael D Chaine

Anup K Sharma

Chiajen Lee

Chin Han Lin

Xin Yi Zhang

Tongbi T Jiang

Gennadiy A Agranov

Cristiano L Niclass

Shingo Mandai

Junjun Li

Nobuhiro Karasawa

Neil MacKinnon

Arnaud Laflaquiere

Howard E Rhodes

John David Porter

Oray Orkun Cellek

Hong Wei Lee

Philip H Li

Andreas Bibl

Terry L Gilton

Kapil Vinod Sakariya

Sanjay Dabral

John W Ladd

Emanuele Mandelli

Tore Nauta

Michael Ross Malone

Gershon Rosenblum

Geertjan Joordens

Kevin A Sawyer

Zachary Michael Beiley

Frederick Brady

Bernhard Buettgen

Venkataram R Raju

Andras G Pattantyus-abraham

Kai Shen

Jon Adams

Paul Perez

Xinya Lei

Dajiang Yang

Yuchuan Shao

Neil Mackinnon

Disclosed herein are photodetectors using arrays of pixels with single-photon avalanche diodes (SPADs). The pixel arrays may have configurations that include one or more control transistors for each SPAD collocated on the same chip or wafer as the pixels and located on a surface of the wafer opposite to the light gathering surface of the pixel arrays. The control transistors may be positioned or configured for interconnection with a logic chip that is bonded to the wafer of the pixel array. The pixels may be formed in a substrate having doping gradient. The control transistors may be positioned on or within the SPADs, or adjacent to, but isolated from, the SPADs. Isolation between the individual SPADs and the respective control transistors may make use of shallow trench isolation regions or deep trench isolation regions.

Transistor integration with stacked single-photon avalanche diode (SPAD) pixel arrays

Disclosed herein are global shutter image sensors and methods of operating such image sensors. An image sensor includes a semiconductor wafer having a light receiving surface opposite an electrical connection surface; an oxide extending from the light receiving surface toward the electrical connection surface and at least partially surrounding a pixel region; a photodiode disposed within the pixel region; and a set of storage nodes disposed under the photodiode, between the photodiode and the electrical connection surface. The set of storage nodes comprises a first storage node and a second storage node. The storage nodes may be disposed vertically beneath the photodiode, or side by side.

Dual embedded storage nodes and vertical transfer gates for pixels of global shutter image sensors

A sensor stack is described. The sensor stack includes first and second electromagnetic radiation sensors. The first electromagnetic radiation sensor has a high quantum efficiency for converting a first range of electromagnetic radiation wavelengths into a first set of electrical signals. The second electromagnetic radiation sensor is positioned in a field of view of the first electromagnetic radiation sensor and has a high quantum efficiency for converting a second range of electromagnetic radiation wavelengths into a second set of electrical signals and a low quantum efficiency for converting the first range of electromagnetic radiation wavelengths into the second set of electrical signals. The first range of wavelengths does not overlap the second range of wavelengths, and the second electromagnetic radiation sensor is at least partially transmissive to the first range of electromagnetic radiation wavelengths.

Stacked electromagnetic radiation sensors for visible image sensing and infrared depth sensing, or for visible image sensing and infrared image sensing

A back-illuminated single-photon avalanche diode (SPAD) image sensor includes a sensor wafer stacked vertically over a circuit wafer. The sensor wafer includes one or more SPAD regions, with each SPAD region including an anode gradient layer, a cathode region positioned adjacent to a front surface of the SPAD region, and an anode avalanche layer positioned over the cathode region. Each SPAD region is connected to a voltage supply and an output circuit in the circuit wafer through inter-wafer connectors. Deep trench isolation elements are used to provide electrical and optical isolation between SPAD regions.

Back-illuminated single-photon avalanche diode

One or more cross-wafer capacitors are formed in an electronic component, circuit, or device that includes stacked wafers. One example of such a device is a stacked image sensor. The image sensor can include two or more wafers, with two wafers that are bonded to each other each including a conductive segment adjacent to, proximate, or abutting a bonding surface of the respective wafer. The conductive segments are positioned relative to each other such that each conductive element forms a plate of a capacitor. A cross-wafer capacitor is formed when the two wafers are attached to each other.

Image sensor with a cross-wafer capacitator

An optoelectronic device includes a semiconductor substrate and an array of optoelectronic cells, formed on the semiconductor substrate. The cells include first epitaxial layers defining a lower distributed Bragg-reflector (DBR) stack; second epitaxial layers formed over the lower DBR stack, defining a quantum well structure; third epitaxial layers, formed over the quantum well structure, defining an upper DBR stack; and electrodes formed over the upper DBR stack, which are configurable to inject an excitation current into the quantum well structure of each optoelectronic cell. A first set of the optoelectronic cells are configured to emit laser radiation in response to the excitation current. In a second set of the optoelectronic cells, interleaved with the first set, at least one element of the optoelectronic cells, selected from among the epitaxial layers and the electrodes, is configured so that the optoelectronic cells in the second set do not emit the laser radiation.

Creating arbitrary patterns on a 2-d uniform grid VCSEL array

Apparatuses and methods for charge transfer in image sensors are disclosed. One example of an image sensor pixel may include a first charge storage node and a second charge storage node. A transfer circuit may be coupled between the first and second charge storage nodes, and the transfer circuit may have a first region proximate the first charge storage node and configured to have a first potential. The transfer circuit may also have a second region proximate the second charge storage node configured to have a second, higher potential. An input node may be configured to control the first and second potentials based on a transfer signal provided to the input node.

Methods for transferring charge in an image sensor

Creating arbitrary patterns on a 2-D uniform grid VCSEL array

Stacked backside illuminated SPAD array

A vertically stacked image sensor having a photodiode chip and a transistor array chip. The photodiode chip includes at least one photodiode and a transfer gate extends vertically from a top surface of the photodiode chip. The image sensor further includes a transistor array chip stacked on top of the photodiode chip. The transistor array chip includes the control circuitry and storage nodes. The image sensor further includes a logic chip vertically stacked on the transistor array chip. The transfer gate communicates data from the at least one photodiode to the transistor array chip and the logic chip selectively activates the vertical transfer gate, the reset gate, the source follower gate, and the row select gate.

Image sensor having full well capacity beyond photodiode capacity

An optoelectronic device includes a semiconductor substrate, having front and back sides and having at least one cavity extending from the back side through the semiconductor substrate into proximity with the front side. At least one optoelectronic emitter is formed on the front side of the semiconductor substrate in proximity with the at least one cavity. A heat-conducting material at least partially fills the at least one cavity and is configured to serve as a heat sink for the at least one optoelectronic emitter.

VCSEL structure with embedded heat sink

A radiation source includes a semiconductor substrate, an array of vertical-cavity surface-emitting lasers (VCSELs) formed on the substrate, which are configured to emit optical radiation, and a transparent crystalline layer formed over the array of VCSELs. The transparent crystalline layer has an outer surface configured to diffuse the radiation emitted by the VCSELs.

Top-emission VCSEL-array with integrated diffuser

Growing community of inventors

San Jose, CA, United States of America

Xiaofeng Fan