Skhynix Inc.

Xiaofang Chen

Wenwei Wang

Danyang Qiao

Ping Zheng

Lock Duc Nguyen

Satish Pratapneni

Priyadarsini Lanka

Sonny Mirador

Akshay Ganesh

Hao Tian

Dean Hogle

Devices, systems, and methods for measuring a power consumption of a hot pluggable solid-state drives are described. An example method for measuring a power consumption of a solid-state drive communicatively coupled to a server backplane within a server chassis includes performing, by an adaptor, a power measurement to generate a value corresponding to the power consumption of the solid-state drive, and transmitting, using a wireless transceiver of the adaptor, the value to a recording unit, where a first end of the adaptor is coupled to the solid-state drive and a second end of the adaptor is coupled to the server backplane, and where the wireless transceiver, communicatively coupled to an antenna, is configured to operate using at least one wireless protocol.

Power measurement methods and systems for hot pluggable solid-state drives in servers

Automated power noise susceptibility test systems are provided for one or more storage devices. A system includes a host; storage devices; and multiple noise injection modules. Each noise injection module includes: a first relay to a third relay, which are coupled to a first path or a second path. The first path includes: an operational amplifier for generating a high noise function; a first variable regulator for generating a first or second regulated power supply voltage; and a capacitor injection circuit for generating low noise function and a first power noise. The second path includes: a second variable regulator for generating a third or fourth regulated power supply voltage and a power amplifier injection circuit for generating a second power noise. The third relay selectively provides the storage device the first power noise or the second power noise.

Automated power noise susceptibility test system for storage device

An adaptor device includes a first interface for coupling to a first processor, a second interface for coupling to a second processor, the second interface being different than the first interface, and a plurality of third interfaces, which are different than either the first interface or the second interface. The plurality of third interfaces are configured for coupling to a corresponding plurality of external devices. The adaptor device is configured to receive, at the first interface, a first signal from the first processor. In response to the first signal, the adaptor device couples through the plurality of third interfaces to the plurality of external devices to enable the first processor substantially concurrent access to the plurality of external devices. The adaptor device is also configured to receive, at the first interface, a second signal from the first processor. In response to the second signal, the adaptor device couples the second processor with a selected one of the plurality of external devices.

UART aggregation and JTAG selection circuitry for a multi-solid state drive environment

A detachable capacitor connection structure is provided for a storage device. In an embodiment, a connection element detachably connects a capacitor module including one or more capacitors to a circuit board such that the capacitor module is stacked over the circuit board. The connection element includes: a first connector including two pin headers, mounted on a bottom plane of the capacitor module; and a second connector including two sockets, mounted on a top plane of the circuit board corresponding to the bottom of the capacitor module, suitable for connecting the first connector to the circuit board.

Storage device with detachable capacitor connection structure

Noise injection systems and methods for conducting power noise susceptibility tests on memory systems, including solid state drives. A noise injection system comprises a power selector to deliver a voltage at a first or second level according to a frequency level indicated by a frequency select signal; a noise signal relay to receive a frequency noise signal and to deliver a low or high frequency noise component of the frequency noise signal according to the frequency level of the frequency select signal; and an amplification assembly, responsive to the frequency select signal and which receives the first or second level voltage based on the frequency level of the frequency select signal, receives and amplifies the high frequency noise component when the frequency select signal indicates a high frequency level, and receives and amplifies the low frequency noise component when the frequency select signal indicates a low frequency level.

Noise injection for power noise susceptibility test for memory systems

A power failure protection system is provided for a solid state drive. In an embodiment, the system includes: power converters; a stand-by power converter; a power switch array including power switch pairs; and a power control complex programmable logic device. The power control complex programmable logic device monitors power failures of the power converters; when a power failure of a particular power converter is detected, configures a power level for the stand-by power converter, the configured power level corresponding to the failed power converter; and controls a target power switch pair corresponding to the failed power converter such that an operation voltage generated by the stand-by power converter is applied to an internal component.

Power failure protection system for solid state drives

A printed circuit board (PCB) structure is provided for a solid state drive. In an embodiment, a solid state drive includes top and bottom layers, multiple intermediate layers and a ground cage. Each of top and bottom layers includes a plurality of components for operation of the solid state drive. The multiple intermediate layers enable electrical signals to pass between components on the top and bottom layers, one of the multiple intermediate layers including a power plane having a high voltage relative to each of the other planes. The ground cage shields signal traces on the same layer as the power plane and planes in adjacent layers from noise generated by the power plane.

Printed circuit board structure for solid state drives

Circuits integrating OR logic and level shifting functionality and methods of operating the same are configured to accommodate different applications. One such circuit comprises first and second transistors coupled in parallel defining first and second nodes, the first transistor being responsive to a first input signal and the second transistor being responsive to a second input signal; a first resistor coupled between a power supply terminal of the circuit and the first node; and a second resistor coupled between the second node and a ground terminal of the circuit. The circuit generates an output signal having a voltage level that is lower than a voltage level of each of the first and second input signals.

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Milpitas, CA, United States of America

Xiaofang Chen