Marvell International Limited

Other

Xiaodong Jin

Lawrence Tse

King Chun Tsai

George Chien

Shuran Wei

Sehat Sutardja

Yonghua Song

A method includes, in at least one aspect, connecting an input of a bias circuit and an output of the bias circuit to another circuit while the other circuit is in a first power mode, such that the bias circuit has an operating state corresponding to the first power mode; switching the input of the bias circuit and the output of the bias circuit from the other circuit to a dummy circuit when a power mode of the other circuit is changed from the first power mode to a second power mode; and maintaining the bias circuit at the operating state corresponding to the first power mode using the dummy circuit while the other circuit is in the second power mode.

Method and apparatus for reducing wake up time of a powered down device

A dummy circuit is provided to which a bias circuit of an low noise amplifier (LNA) can be coupled to during power down of the LNA. The dummy circuit maintains the bias circuit at an approximately normal operating state to reduce wake up time of the LNA.

A low noise amplifier includes an input stage. The input stage includes a first device configured to receive an input signal. A second device is connected to the first device. The second device has a predetermined input impedance. The input stage is configured so that a change in the input signal to the first device causes a linearly proportional change in a conductance of the first device. A voltage at a junction between the first device and the second device remains substantially constant due to the predetermined input impedance of the second device.

Method and apparatus for an LNA with high linearity and improved gain control

A transceiver system includes a first receive path with a first antenna configured to receive first signals, a first configuration switch, a first low noise amplifier configured to amplify the first signals, a second configuration switch, and a receiver. The first receive path is selectively configured to supply the amplified first signals to the receiver via the first antenna, the first configuration switch, the first low noise amplifier, and the second configuration switch. A second receive path includes a second antenna configured to receive second signals, a second low noise amplifier configured to amplify the second signals, the second configuration switch, and the receiver. The second receive path (i) includes fewer configuration switches than the first receive path and (ii) is selectively configured to supply the amplified second signals to the receiver via the second antenna, the second low noise amplifier, and the second configuration switch.

Transceiver system including dual low-noise amplifiers

An electrostatic discharge (ESD) circuit operable to protect an internal circuit from ESD events and protect the internal circuit from high-side supply noise.

Method and apparatus for improving supply noise rejection

A single-ended-to-differential mixer includes a differential input circuit having a single-ended input. The differential input circuit is responsive to a single-ended input signal to generate first and second signals. The single-ended-to-differential mixer includes a passive tank circuit in communication between a reference voltage and the differential input circuit. The single-ended-to-differential mixer includes a mixer circuit in communication with the differential input circuit and responsive to the first and second signals and a second input signal to generate a differential mixer output signal.

Signal mixer having a single-ended input and a differential output

A system for communicating information signals includes a receiver in selective communication with a first antenna and a second antenna. The receiver is configured to selectively receive information signals via the first or second antenna. The system includes a first low-noise amplifier in communication with the first antenna and in selective communication with the receiver. The first low-noise amplifier is configured to amplify a first information signal received by the first antenna to generate a first amplified signal. The system includes a second low-noise amplifier in communication with the second antenna and in selective communication with the receiver. At least the first and second low-noise amplifiers are formed on a monolithic substrate. The second low-noise amplifier is configured to amplify a second information signal received by the second antenna to generate a second amplified signal. Either the first or second amplified signal is selectively applied to the receiver.

A method for reducing a parasitic capacitance of an electrostatic discharge (ESD) protection circuit for an integrated circuit (IC) includes providing an ESD protection circuit including a plurality of transistors; coupling one end of a resistor to a shared drain of the plurality of transistors; and coupling an opposite end of the resistor to at least one of an input pad of the IC, a blocking capacitor of the IC and a transistor in the IC.

Electrostatic discharge protection circuit

A mixer comprises a differential input circuit that is configured to receive an input signal. The mixer comprises a tank circuit including a tuning capacitor arranged in parallel with an inductor. A resonant frequency of the inductor and tuning capacitor is substantially centered around a predetermined frequency of the input signal. The mixer comprises a mixer circuit that communicates with the differential input circuit and that is configured to receive first and second current signals and a second input signal. The mixer circuit is configured as a Gilbert cell double-balanced switching mixer for generating a differential mixer output signal as a product of the first and second current signals and the second input signal.

A low noise amplifier (LNA) circuit includes a linear input stage including a first circuit that generates an output current and has a low input impedance. A device receives an input signal, communicates with the low impedance input of the first circuit, and includes a variable resistor having a resistance that varies based on the input signal.

A low-noise amplifier comprises a first amplification circuit that includes a control terminal and a first terminal. An impedance load communicates with the first terminal. A feedback circuit outputs an output current to the first terminal and that generates a bias current, which is output to the control terminal and is based on a difference between the output current and N times a reference current, where N is greater than zero.

Active bias circuit for low-noise amplifiers

An analog signal processing circuit comprises a bias circuit, a first circuit including a control input that communicates with the bias circuit, a first terminal that generates an output current, and a second terminal, and a device that communicates with the second terminal of the first circuit, that includes a variable resistor, and that has a resistance that is modulated in response to an input signal to the analog signal processing circuit.

A low-noise amplifier with a first amplification circuit that includes a control terminal, a first terminal, and a second terminal that communicates with a first reference voltage. An impedance load that communicates with the first terminal and a feedback circuit that comprises a current source that communicates with a second reference voltage. A comparator circuit that includes a first input, a second input and an output that communicates with the control terminal. A first impedance that communicates with the current source and the first input and that generates a predetermined reference voltage based on a reference current generated by the current source and a second impedance that communicates with the second input and the impedance load wherein the feedback circuit compares a voltage, based on an output current associated with the first terminal, with the reference voltage to generate a bias signal that is applied to the control terminal.

A low noise amplifier (LNA) comprises a bias circuit having an output. A first transistor includes a control input that communicates with the bias circuit, a first terminal that generates a LNA output current and a second terminal. A device communicates with the second terminal of the first transistor, includes a variable resistor, and has a resistance that is modulated in response to an input signal to the LNA.

A bias circuit for biasing a linear input stage of an amplifier comprises a first MOS device having a size. A second MOS device has a size and is arranged with the first MOS device in a cascode configuration. The second MOS device is operated in a saturation region. A third MOS device has a size and biases the first MOS device in a triode region. A bias switch ratio of the size of the first MOS device to the size of the third MOS device is greater than one.

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Xiaodong Jin