Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.

Shenzhen China Star Optoelectronics Technology Co., Ltd.

Xiaodi Liu

Mian Zeng

Wenying Li

The invention provides a manufacturing method of the TFT array substrate. Compared to existing 4M process, the invention changes the structural design of the semi-transmissive mask for the photoresist layer for patterning the source/drain metal layer and the semiconductor layer. The edge forms a reduced thickness edge portion, so that the edge of the photoresist layer is thinned, and thereby the width of the photoresist layer is easily reduced in subsequent processes, and the semiconductor layer at the edge of the metal wire structure is easily etched during dry etching, reducing the tailing problem of the active layer at edges of source/drain to achieve finer metal wire structure, and improve optical stability, electrical performance, aperture ratio, reliability, power consumption, and the overall performance of the TFT array substrate. The residual problem of amorphous and heavily doped silicon on source/drain edge in original process is solved or reduced.

Manufacturing method of TFT array substrate

A display panel includes a first metal layer and a second metal layer sequentially stacked. The first metal layer includes a plurality of first metal lines and first gaps arranged between the first metal lines. The second metal layer includes a plurality of second metal lines arranged in a spaced manner. The second metal lines have an extension direction that is identical to an extension direction of the first metal lines. The second metal lines and the first metal lines are arranged to stagger, in position, with respect to each other. The second metal lines have orthogonal projections on the first metal layer that are located in areas of the first gaps in order to prevent shorting between the second metal lines in a process of manufacturing the second metal lines. A method for manufacturing the display panel and a display device are also provided.

Display panel and manufacturing method thereof and display device

An array substrate includes a carrier plate, a first heat dissipation layer, and a function layer sequentially stacked on each other. The function layer is arranged on one side facing a user. The function layer includes a plurality of drive devices, metal wires and connection sections arranged between the plurality of drive devices. The plurality of drive devices are formed with openings. The connection sections each have an end extending through the openings to connect with one of the drive devices and an opposite end extending across the metal wires to connect with an adjacent one of the drive devices. The first heat dissipation layer conducts heat from the metal wires, the plurality of drive devices, and the connection sections through the carrier plate for dissipation. A method for manufacturing the array substrate and a display device are also provided.

Array substrate and manufacturing method thereof and display device

The present invention provides a mask for manufacturing a TFT in a 4M production process and a TFT array manufacturing method of a 4M production process. For the mask for manufacturing a TFT in a 4M production process, in a TFT layout structure of the mask, a line pattern is provided adjacent to an outer edge of a TFT pattern to extend along the outer edge of the TFT pattern. The present invention also provides a corresponding TFT array manufacturing method of the 4M production process, which uses the mask of the present invention to serve as a mask for a second mask-based process. The mask for manufacturing a TFT in a 4M production process according to the present invention allows for achievement of an edge-thinned structure through variation of edge exposure of the mask so as to make plasma etching more easily performed on such a structure to thereby reduce residues of amorphous silicon and heavily-doped silicon on an edge of a second metal layer. The TFT array manufacturing method of the 4M production process of the present invention is such that the mask of the present invention is used in combination with a 4M production process to alleviate the problems of residues of amorphous silicon and heavily doped silicon on an edge of a second metal layer.

Mask for manufacturing TFT in 4M production process and TFT array manufacturing method of 4M production process

The invention provides a TFT substrate and manufacturing method thereof. The TFT substrate comprises: base substrate, TFT layer, passivation layer and pixel electrode, stacked in above order; wherein the pixel electrode comprising: main electrode, and connection electrode connected to main electrode; the connection electrode connected to TFT layer through pixel electrode via; main electrode having a cross-like slit structure with branch electrode on four trunks of cross, and the connection electrode comprising a plurality of parallel stripe-shaped first branch electrodes, and a second branch electrode connected to the first branch electrodes; by disposing the first branch electrodes, the connection electrode having a shape similar to main electrode to make the main and connection electrodes having similar single slit diffraction when exposed to reduce or eliminate the photo-resist thickness difference in pixel electrode area in the 3M process to avoid display defect and improve yield rate.

TFT substrate and manufacturing method thereof

The present disclosure relates to a thin film transistor (TFT) array substrate and a manufacturing method thereof. The manufacturing method includes adopting a shading metal layer to form the bottom gate electrode, depositing a buffer layer on the substrate having the bottom gate electrode, applying a patterned process on the buffer layer to reduce the thickness of the buffer layer on the bottom gate electrode, applying the patterned process on the semiconductor layer to form the semiconductor pattern corresponding to the bottom gate electrode within the thin area of the buffer layer. The present disclosure may reduce a thickness of the buffer layer corresponding to the bottom gate electrode, so as to improve the whole performance of the array substrate caused by the bottom gate electrode.

Thin film transistor (TFT) array substrates and manufacturing methods thereof

The present invention provides a TFT array manufacturing method of an optimized 4M production process. The method includes: Step, in a first mask-based process, making a gate layer on a glass substrate and patterning the gate layer; Step, in a second mask-based process, subjecting the photoresist layer to exposure and development; conducting a first wet etching operation to pattern the source/drain layer; conducting a first oxygen ashing operation to reduce a size of trailing of the active layer on edges of the source/drain metal layer; conducing a first dry etching operation to form an active layer island structure; conducting a second oxygen ashing operation to expose portions of the source/drain layer in the channel area; conducting a second wet etching operation to pattern a source and a drain; conducting a third oxygen ashing operation to reduce trailing of the contact layer; and conducting a second dry etching operation to etch the active layer; Step, in a third mask-based process, making a passivation layer followed by patterning; and Step, in a fourth mask-based process, making a transparent electrode layer followed by patterning. The present invention allows for, on the basis of an existing production process, successful elimination of heavily doped residue in a channel area (by reducing around 0.9 um) and reducing around 1 um in an amorphous silicon area.

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Shenzhen, China

Xiaodi Liu