Maxim Integrated Products, Inc.

Xiansong Chen

Yi-Sheng Anthony Sun

Yong L Xu

Arkadii V Samoilov

Kumar Nagarajan

Viren V Khandekar

Tiao Zhou

Satbir Madra

Kaysar M Rahim

A wafer level package includes a wafer, a lead disposed of the wafer for connecting the wafer to an electrical circuit, and a core disposed of the lead. In some embodiments, the lead disposed of the wafer is a copper pillar, and the core is plated onto the copper pillar. In some embodiments, the core is polymer screen-plated onto the lead. In some embodiments, the core extends between at least approximately thirty-five micrometers (35 &#x3bc;m) and fifty micrometers (50 &#x3bc;m) from the lead. In some embodiments, the core covers between at least approximately one-third (&#x2153;) and one-half (&#xbd;) of the surface area of the lead. In some embodiments, the core comprises a stud-shape extending from the lead. In some embodiments, the core extends perpendicularly across the lead. In some embodiments, the core extends longitudinally along the lead. Further, a portion of the core can extend perpendicularly from a longitudinal core.

Solder fatigue arrest for wafer level package

A semiconductor package device, electronic device, and fabrication methods are described that include at least one sacrificial contact pad as a portion of the semiconductor package device for preventing and reducing stress on the semiconductor package device and increasing board level reliability. In implementations, the semiconductor package device includes a lead frame substrate including at least one lead frame contact pad and at least one sacrificial contact pad, an integrated circuit device electrically coupled to the lead frame substrate, and an encapsulation layer that encapsulates the lead frame substrate and the integrated circuit device. In implementations, one process for fabricating the semiconductor package device includes placing an integrated circuit device on a lead frame substrate, where the lead frame substrate includes at least one lead frame contact pad and at least one sacrificial contact pad, and encapsulating the integrated circuit device and the lead frame substrate with an encapsulation layer.

Sacrificial pad on semiconductor package device and method

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Allen, TX, United States of America

Xiansong Chen