Spansion Llc.

Xianmin Yi

Yu Nan Sun

Mark W Randolph

Kuo-Tung Chang

Darlene G Hamilton

Yi He

Zhizheng Liu

Amol Ramesh Joshi

Sung-Yong Chung

Gulzar Ahmed Kathawala

Edward Franklin Runnion

Sung-Chul Lee

Yanxiang Liu

Yuji Mizuguchi

Yanxia (Emma) Lin

Systems, methods, and devices that facilitate applying a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected during a read or verify operation to facilitate reducing adjacent wordline disturb are presented. A memory component can comprise an optimized operation component that can apply a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected for a read or verify operation, based at least in part on predefined operation criteria, to facilitate reducing adjacent wordline disturb in the selected memory cell to facilitate reducing a shift in the voltage threshold and maintain a desired operation window. The optimized operation component optionally can include an evaluator component that can facilitate determining whether a negative gate voltage applied to adjacent wordlines is to be adjusted to facilitate reducing adjacent wordline disturb below a predetermined threshold amount.

Applying negative gate voltage to wordlines adjacent to wordline associated with read or verify to reduce adjacent wordline disturb

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Santa Clara, CA, United States of America

Xianmin Yi