Boe Technology Group Co., Ltd.

Hefei Boe Optoelectronics Technology Co., Ltd.

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Xianjie Shao

Honggang Gu

Xiaohe Li

Jie Song

Rui Ma

Qinghua Jiang

Bo Liu

Junsheng Chen

Zhangmeng Wang

Tong Yang

Yimin Chen

Xiujuan Wang

Yong Liu

Xiaojie Zhang

Hongmin Li

Yongcan Wang

Ming Hu

Xiaoye Ma

Fengzhen Lv

Tingting Zhao

Ruifang Du

Feng Qin

Feng Qu

Zhen Zhang

Wei Xue

Fei Zhao

Guolei Wang

Quan Gan

Yuanyang Zhao

Hui Wang

Xibin Shao

Jing Lv

Li Li

Chuncheng Che

Chun Long Wang

Rui Li

Yuanbo Zhang

Zhangtao Wang

Dayu Zhang

Zhifu Dong

Zhizhong Tu

Lili Yao

Li Yin

Yongxian Xie

Yanping Zhang

Yuting Yang

Long Xia

Yanchun Lu

Zhaozhe Xu

Zhiyang Gao

Byung Cheon Lim

Chuanjiang Tang

Qianqian Wang

Ya Yu

Min Zhong

Shuishui Zhang

Mingfei Zhang

Haosen Ge

Pengcheng Mu

Mengke Zhao

Chengna Liu

A display substrate has a display area and an encapsulation area around the display area. The display substrate includes a substrate and a spacer layer. The spacer layer is located on a side of the substrate, and includes a plurality of first columnar spacers located in the encapsulation area and distributed at intervals around the display area, and bottom ends of the plurality of first columnar spacers are fixedly disposed on the substrate. Ends of the plurality of first columnar spacers proximate to the substrate are the bottom ends thereof, and ends of the plurality of first columnar spacers away from the substrate are top ends thereof.

Display substrate and manufacturing method therefor, and display device

A display substrate and a display device are disclosed. The display substrate includes a base substrate and a plurality of shift register units; each of the plurality of shift register units includes an input circuit, an output circuit, a first reset circuit and a frame reset signal connection wire; the frame reset signal connection wire and is configured to provide a frame reset signal to the first reset circuit; the first reset circuit is configured to respond to the frame reset signal, so as to reset a first node and an output end within a time period between two display frames of the display substrate; the first reset circuit includes a first transistor and a second transistor, and the frame reset signal connection wire, a gate of the first transistor and a gate of the second transistor are provided on a first conductive layer.

Display substrate and display device

Disclosed is a display panel including: first spacer on the array substrate, an orthographic projection of the first spacer on the array substrate being a first pattern extending along a first direction; a second spacer on the counter substrate, an orthographic projection of the second spacer on the array substrate being a second pattern extending along a second direction; at least two third spacers, orthographic projections of which on the array substrate being respectively on two sides of the first pattern along the first direction; at least two fourth spacers, orthographic projections of which on the array substrate being respectively on two sides of the second pattern along the second direction; one of the third spacer and the fourth spacer is on the array substrate, and the other is on the counter substrate.

Display panel and display device

Disclosed are a gate driving circuit and a display device. According to the gate driving circuit, in every five adjacent shift registers, the output control end of the first shift register is electrically connected to the input signal end of the fifth shift register; in every six adjacent shift registers, the output control end of the sixth shift register is electrically connected to the reset signal end of the first shift register. In the gate driving circuit of a cascade structure provided by the present disclosure, there are fewer cascade signal lines, thereby saving space, further implementing the narrow bezel of a display device; in addition, for the gate driving circuit of a cascade structure provided by the present disclosure, the signal provided by an external circuit board can be more flexible, even if a display product is manufactured, the pulse width of a clock signal can be adjusted by means of the external circuit board, thereby adjusting the high-level width of a gate signal output by a gate signal output end, and the flexibility is high.

Gate driving circuit and display device

Provided is a display panel. The display panel comprises an array substrate and a color filter substrate, wherein the color filter substrate comprises a second substrate and a black matrix pattern, wherein the black matrix pattern comprises a body, via hole shielding parts, and compensation shielding parts, the via hole shielding parts being disposed within first domains of part of plurality of sub-pixel regions, the compensation shielding parts being disposed within second domains that are adjacent in first direction to the first domains where the via hole shielding parts are disposed, and at most one of the via hole shielding part and the compensation shielding part being disposed in one sub-pixel region.

Display panel, manufacturing method thereof, and display device

Embodiments of the present disclosure provide a display panel, a preparing method, and a display device. The display panel includes: a color film substrate and an array substrate opposite to the color film substrate. The color film substrate includes: an opposite substrate, a color resistance layer on the opposite substrate and a plurality of support structures on a side, away from the opposite substrate, of the color resistance layer at intervals. The array substrate includes: a base substrate and a plurality of auxiliary structures on a side, facing the opposite substrate, of the base substrate at intervals. At least one auxiliary structure of the plurality of auxiliary structures correspondingly contacts with at least one support structure of the plurality of support structures.

Display panel, preparing method, and display device

A selection circuit, a method for controlling the selection circuit, and a multiplexing circuit are provided. The selection circuit includes N control circuits and M booster circuits. Control terminals of M control circuits among the N control circuits are coupled to output terminals of the M booster circuits, respectively, and first input terminals of the M booster circuits are coupled to receive M control signals among N control signals, respectively. Second input terminals of the M booster circuits are coupled to receive M boost signals respectively, and each booster circuit is configured to provide the received control signal to an output terminal of the booster circuit and increase a potential at the output terminal of the booster circuit by using the received boost signal.

Selection circuit and method for controlling the same, and multiplexing circuit

Provided are a shift register, a driving method thereof, and a gate driving circuit. The shift register includes an input sub-circuit, a first reset sub-circuit, an output sub-circuit, a pull-down sub-circuit, a pull-down control sub-circuit, and a second reset sub-circuit. The input sub-circuit provides a signal of the first voltage source to the pull-up node and the first node under the control of the signal input terminal; the first reset sub-circuit provides a signal of the second voltage source to the pull-up node and the first node under the control of the reset terminal; the output sub-circuit outputs the signal of the clock signal terminal to the signal output terminal according to the level of the pull-up node.

Shift register and driving method thereof, gate driving circuit

The present disclosure provides a shift register, a gate driving circuit and a display panel, and belongs to the field of display technology. The shift register of the present disclosure includes: an input circuit configured to precharge and reset a pull-up node; one pull-down control circuit being electrically connected to one pull-down circuit through a pull-down node; the pull-down control circuit being configured to control a potential at the pull-down node under a first power voltage; each pull-down circuit being configured to pull down the potential at the pull-down node in response to a potential at the pull-up node; an output circuit configured to output a clock signal through a signal output terminal in response to the potential at the pull-up node; one first noise reduction circuit connected to one pull-down node.

Shift register, gate driving circuit and display panel

An array substrate has a plurality of sub-pixel regions, and each sub-pixel region includes an opening region and a pixel defining region surrounding the opening region. The array substrate includes a base and a plurality of touch signal lines disposed on the base. An orthographic projection of at least one touch signal line on the base passes through, along an extending direction thereof, at least one opening region.

Array substrate, touch display panel, and touch display apparatus

The present application provides a display panel having a first array substrate, a first liquid crystal layer, a second array substrate, a second liquid crystal layer, a reflective layer, and a counter substrate. The second array substrate is between the first array substrate and the counter substrate; the first liquid crystal layer is between the first array substrate and the second array substrate; the second liquid crystal layer is between second array substrate and the counter substrate; and the reflective layer is between the first liquid crystal layer and the second liquid crystal layer. The display panel has a plurality of reflective regions and a plurality of transmissive regions. The reflective layer is present in the plurality of reflective regions and absent in the plurality of transmissive regions.

Display panel and method of driving image display in display panel

A shift register unit, a driving method thereof, a gate driving circuit, and a display device. The shift register unit comprises an input circuit, a control circuit, a reset circuit, an output circuit and a first capacitor, where the input circuit provides a signal from an input signal terminal to a first node; the control circuit controls signals from the first node and a second node; the reset circuit provides a signal from a reference signal terminal to the first node; the output circuit provides a signal from a clock signal terminal to a signal output terminal, and provides the signal from the reference signal terminal to the signal output terminal; and the first capacitor is coupled between the clock signal terminal and the second node.

Shift register unit, driving method thereof, gate driving circuit and display device

A shift register, including: a first input circuit configured to supply a first reference signal of a first reference signal terminal to the pull-up node under control of an input signal of the input signal terminal; a pull-up node state maintaining circuit configured to supply a third reference signal of the third reference signal terminal to the pull-up node when the potential of the pull-up node is a first potential, and supply a fourth reference signal of the fourth reference signal terminal to the pull-up node when the potential of the pull-up node is a second potential; and an output circuit configured to output a first clock signal of the first clock signal terminal to the gate signal output terminal under control of the potential of the pull-up node.

Shift register and driving method thereof, gate driving circuit and display device

A gate driving unit, a method for driving the same, a gate driving circuitry and a display module are provided. The gate driving unit includes: a shift register circuit configured to delay a phase of an input signal inputted by a signal input end under control of a first clock signal input end and a second clock signal input end to obtain a carry signal, and output the carry signal through a carry end; and a pulse width regulation circuit configured to regulate a pulse width of the carry signal under control of the enable end to obtain a gate drive signal, and output the gate drive signal through a gate drive signal output end.

Gate driving unit, method for driving the same, gate driving circuitry and display module

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Beijing, China

Xianjie Shao