Texas Instruments Corporation

Ess Technology, Inc.

Xianggang Yu

Terry Lee Sculley

Jung-Kuei Chang

Jeffrey Alan Niehaus

An asynchronous sample rate converter interpolates and filters a digital audio input signal to produce a filtered, up-sampled first signal. A FIFO memory receives the first signal and stores samples thereof at locations determined by a write address and presents stored samples from locations determined by a read address. The presented samples are passed through an interpolation and resampling circuit to produce a continuous-time signal which is re-sampled to produce a signal that is up-sampled relative to a desired output. That signal then is filtered and down-sampled to produce the output signal. Sample rate estimating circuitry computes a difference signal representative of a time at which a data sample of the audio input signal is received and a time at which a corresponding audio output sample is required, and address generation circuitry generates the read and write addresses. A coefficient calculation circuit calculates filter coefficients for the interpolation and resampling circuit in response to the difference signal.

Asynchronous sample rate converter and method

A digital sample rate converter converts a digital input signal (Din) having a first sample rate (Fs_in) to a corresponding digital output signal Dout having a second sample rate (Fs_out), wherein an upsampling circuit (3) upsamples the digital input signal (Din) by a factor of N and a feedback algorithm circuit (23A) receives a corresponding digital signal of the same sample rate (Fs_in*N) to produce a digital signal (X6) having a sample rate which is a second predetermined factor (M) times the second sample rate (Fs_out). That signal is filtered by a decimation filter (17) and then downsampled by a predetermined factor to produce the digital output signal (Dout) with the second sample rate (Fs_out).

Digital sample rate converter architecture

An improved dynamic element matching technique for providing noise-shaping of non-linearity in data converters, such as a multi-bit digital-to-analog converter, is provided. The improved DEM technique is configured with a new method for generating the bit patterns, which permits a less complex digital DEM circuit that provides improved performance. The proposed DEM algorithm introduces a new priority calculation method in which a multi-bit quantizer can be used in an oversampled delta sigma modulator to produce an output which is converted to an output code, such as a thermometer code output. The thermometer code output can be coupled as input bits through a dynamic element matching sort block to provide an output comprising a plurality of bits. Each output bit of the dynamic element matching sort block is sampled and coupled back to each of a plurality of corresponding filters, which comprise cascaded integrators. The sort block is configured to compare the respective outputs of each filter to shuffle the input bits to generate an output such that the filter output values converge towards each other. In this way, the bit sequence on each output bit line will have the noise-shaping with the order determined by the number of integrators cascaded in the signal path of each filter. The resultant output signals can then be passed through an internal multi-bit DAC to provide an output to an analog low-pass filter to remove out-of-band noise, leaving the signal band having an improved signal-to-noise (SNR) with the non-linearity components removed.

Method and apparatus for spectral shaping of non-linearity in data converters

A decimation filtering circuit for performing a decimation operation with a decimation factor of M in a pipelined structure. A finite impulse response ('FIR') filtering of N taps for achieving a desired frequency response is designed to have an integral ratio of N/M. A total of N/M processing stages is connected in series to accumulate filtered data based on data samples of an input signal and predetermined FIR coefficients. Each of the N/M processing stages produces an accumulated output in every other M accumulations for M input data samples.

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Xianggang Yu