Marvell International Limited

Black Sesame Technologies Inc.

Qualcomm Incorporated

Xiangdong Jin

Mao Yu

Chengyu Xiong

Fen Zhou

Chi-Yuen Young

Jianwei Bei

Xiaotao Xu

Lawrence Tse

Yun Du

Alexei Vladimirovich Bourd

Lin Chen

Liang Han

A method of constructing an adaptive multiply accumulate layer in a convolutional neural network, including determining an activation data map width, an activation data map height, a channel depth, a batch, a kernel width, a kernel height and a filter set number, setting a first dimension of an adaptive multiplier layer based on the activation data map width, setting a second dimension of the adaptive multiplier layer based on the channel depth, setting a third dimension of the adaptive multiplier layer based on the filter set number and constructing the adaptive multiplier layer based on the first dimension, the second dimension and the third dimension.

Convolutional neural network using adaptive 3D array

A method of subgraph tile fusion in a convolutional neural network, including partitioning a network into at least one subgraph node, determining a layer order of at least one layer of the at least one subgraph node, determining a input layer of the at least one subgraph node, determining a weight layer of the at least one subgraph node, determining a output layer of the at least one subgraph node and fusing the at least one subgraph node, the input layer, the weight layer and the output layer in the layer order.

Subgraph tile fusion in a convolutional neural network

A method of hierarchical structuring a multi-level memory in a convolutional neural network, includes partitioning a memory into a plurality of sections, partitioning the plurality of sections into a plurality of stripes, utilizing input data from the plurality of stripes in a MAC array, outputting an intermediate result from the MAC array to at least one of the plurality of stripes of a result buffer, looping back the intermediate result from the at least one of the plurality of stripes of the result buffer to at least one of the plurality of stripes of an input data buffer and outputting a final result from the at least one of the plurality of stripes of the result buffer to at least one of the plurality of stripes of an output buffer.

Multi-level memory hierarchy

Techniques are described to perform a shuffle operation. Rather than using an all-lane to all-lane cross bar, a shuffler circuit having a smaller cross bar is described. The shuffler circuit performs the shuffle operation piecewise by reordering data received from processing lanes and outputting the reordered data.

Shuffler circuit for lane shuffle in SIMD architecture

In accordance with the teachings described herein, system and methods are provided for a GPS PRN code interpolation scheme with a reduced memory requirement. An example GPS receiver system may include a memory, a local PRN code generator, and an interpolator. The memory may be used to store GPS PRN code received from a global positioning satellite. The local PRN code generator generates a replica PRN code having a repeating code that includes at least a first epoch and a second epoch. The interpolator determines an offset point in the first epoch of replica PRN code and interpolates the replica PRN code at a predetermined sample rate to generate an interpolated replica PRN code for use in correlating with the GPS PRN code.

Zero delay reduced memory GPS PRN code interpolation

In accordance with the teachings described herein, system and methods are provided for a GPS acquisition correlation scheme with a reduced memory requirement. An example system may include a memory, a local PRN code generator, correlators, adder trees, an accumulator, and an output memory. The memory may be used to store an input PRN code. The local PRN code generator generates a replica PRN code and outputs a replica PRN code. The local PRN code generator may also shift the replica PRN code for each output epoch. One or more correlators receive the input PRN code and the replica PRN code and compare a bit of the input PRN code to a bit of the replica PRN code and generates a comparison. The adder trees add the comparisons and generate a comparison output. An accumulator accumulates the comparison output and outputs an accumulated output to an output memory.

Method and apparatus for correlating global positioning system (GPS) pseudorandom noise (PRN) codes

A system includes a memory with columns and rows. A sampler samples a first portion of a signal during first periods to obtain sets of samples, respectively. The sets of samples include a first set having first samples and a second set having second samples. A first controller writes each set in the sets of samples in a respective one of the columns. The first controller writes: the first samples in a first column such that each of the first samples is stored in a respective one of the rows; the second samples in a second column such that each of the second samples is stored in a respective one of the rows; and the second samples in the second column subsequent to writing the first samples in the first column. A second controller reads third samples stored in a first row and fourth samples stored in a second row.

Apparatus and method for writing and reading samples of a signal to and from a memory

A single-ended-to-differential mixer includes a differential pair amplifier, a passive current source, a cancellation sub-circuit, and a mixer. The differential pair amplifier is configured to receive a single-ended input signal. The differential pair amplifier includes a first input, a second input, a first output, and a second output. The passive current source is connected between (i) the differential pair amplifier and (ii) a reference potential. The cancellation sub-circuit is connected to each of the first input, the second input, the first output, and the second output of the differential pair amplifier. The cancellation sub-circuit is configured to at least partially cancel a non-linearity of the differential pair amplifier. The mixer is connected to each of the first output and the second output of the differential pair amplifier.

Signal mixer having a single-ended input and a differential output

Apparatus having corresponding methods and non-transitory computer-readable media comprise: a sampler configured to sample a signal, wherein the signal is modulated with a waveform having a known period, wherein the sampler obtains K samples in each period, and wherein each of the samples is N bits long, wherein K is an integer greater than 0, and N is an integer greater than 1; a memory bank, wherein the memory bank has M columns and K rows, wherein each column is N bits wide, and wherein M is an integer greater than 0; a write controller configured to write the samples to the memory bank in column order; a read controller configured to read the samples from the memory bank in row order; and an integrator configured to integrate the samples read from the memory bank, wherein the integrator provides a respective integration result for each row.

Buffering techniques for rapid processing of samples of signals modulated with periodic waveforms

In one embodiment, an analog-to-digital converter (ADC) receives a radio frequency (RF) signal and converts the RF signal into a digital signal at an intermediate frequency. The ADC uses a sampling frequency that is a multiple of the intermediate frequency to perform the conversion. A selector receives the digital signal and outputs a combined in phase and quadrature signal at a plurality of sampling points based on the sampling frequency. A filter receives the combined in phase and quadrature signal and outputs a baseband in phase baseband signal and a baseband quadrature baseband signal.

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Mountain View, CA, United States of America

Xiangdong Jin