International Business Machines Corporation

Xiangang Cheng

Oliver Keren Ban

Katherine June Pearsall

Eric James St Amand

Liang Huang Lee

A computer-implemented method and apparatus for managing an out of order dispatched instruction queue in a microprocessor. In one embodiment, the method and apparatus include assigning a group identification number and a target identification number to an instruction in an instruction stream. The group identification number and the target identification number are labeled inside an instruction fetcher unit. The group identification number and the target identification number are pre-decoded. The instruction is sent to an instruction queue. The instruction is re-ordered in the instruction stream after executing the instruction utilizing information from the pre-decoding of the group identification number and the target identification number.

Assigning and pre-decoding group ID and tag ID prior to dispatching instructions in out-of-order processor

The illustrative embodiments described herein provide a computer implemented method, apparatus, and computer program product for increasing efficiency associated with data access. In one illustrative embodiment a memory chip is presented comprising of a plurality of memory units for storing data; a plurality of processing units for processing the data; and a word line and a bit line external to the plurality of memory units, wherein the plurality of processing units directly access the word line and the bit line in accessing the data.

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Shenzhen, China

Xiangang Cheng