Qualcomm Incorporated

Lsi Corporation

Xiang Matthew Song

Thomas E Little

Li Qiu

Fredrick Jen

Frederick C Jen

Hsiaohui Wu

Kai Lai

Calvin V Ho

Chih-Ju Hung

Hsiu C Ma

Hsiao-Hui Wu

A system and method to select a gate to be modified as a test isolation gate is disclosed. In a particular embodiment, a method includes, after a layout phase of generating a design of a circuit, receiving timing information related to the design of the circuit. The method also includes selectively identifying at least one gate of a combinational logic portion of the design of the circuit to be modified to respond to a test enable signal, the at least one gate identified at least partially based on the timing information. The method also includes modifying the at least one gate. The at least one modified gate is fixed at a constant level during a test mode and is dynamically changeable during a functional mode of operation of the circuit.

System and method of test mode gate operation

A method of avoiding substrate noise in an integrated circuit includes steps of receiving as input an integrated circuit design that includes at least a portion of a block for placement and routing on a substrate and an outer boundary of the block. An end cell is selected from a set of end cells for terminating the block in an outer area that extends from the outer boundary to an end cell boundary outside the block. The selected end cell is placed in the outer area to isolate the block electrically from the substrate.

Method and end cell library for avoiding substrate noise in an integrated circuit

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Santa Clara, CA, United States of America

Xiang Matthew Song