University of California

Transphorm Technology, Inc.

Xiang Liu

Umesh Kumar Mishra

Toshihide Kikkawa

Stacia Keller

Rakesh K Lal

Carl Joseph Neufeld

David Michael Rhodes

John Kirk Gritters

Mo Wu

Ramya Yeluri

Silvia H Chan

Jing Lu

Matthew A Laurent

Jeonghee Kim

A transistor includes a III-N channel layer; a III-N barrier layer on the III-N channel layer; a source contact and a drain contact, the source and drain contacts electrically coupled to the III-N channel layer; an insulator layer on the III-N barrier layer; a gate insulator partially on the insulator layer and partially on the III-N channel layer, the gate insulator including an amorphous AlSiO layer with 0.2&#x3c;x&#x3c;0.8; and a gate electrode over the gate insulator, the gate electrode being positioned between the source and drain contacts.

Enhancement mode III-nitride devices having an Al-SiO gate insulator

A method of fabricating a III-nitride semiconductor device, including growing an III-nitride semiconductor and an oxide sequentially to form an oxide/III-nitride interface, without exposure to air in between growth of the oxide and growth of the III-nitride semiconductor.

Metalorganic chemical vapor deposition of oxide dielectrics on N-polar III-nitride semiconductors with high interface quality and tunable fixed interface charge

Growing community of inventors

Santa Barbara, CA, United States of America

Xiang Liu