Nxp Usa, Inc.

T-head (shanghai) Semiconductor Co., Ltd.

Freescale Semiconductor,inc.

Other

Cadence Design Systems, Inc.

Inventio Ag

Micro Focus Lcc

Shanghai Huahong Grace Semiconductor Manufacturing Corporation

Alibaba (china) Co., Ltd.

Shanghai Corinline Medical Technology Co., Ltd

Xiang Gao

Wentao Wu

Dechang Wang

Fei Xue

Chongli Wu

Wanfu Ye

Jifeng Wang

Yuming Xu

Jiajing Jin

Zhendong Fei

Jiu Heng

Wei Cao

Hongzhong Zheng

Ming Chen

Yan Zhao

Li Wang

Dengyu Jiang

Yongsheng Wang

Huan Mao

Tao Huang

Kai Long

Lingling Wang

Lingli Wu

An Liu

Ruixiang Chen

Yangjie Zhang

Dongpeng Hou

Jun-Chen Peng

Yuemin Wang

Ying Shen

Liang Xiao

Zhaoqin Wang

A wireless charging transmitter includes first and second input terminals for receiving an input voltage from a power source, a coil, an inverter having first and second inverter input terminals coupled to the first and second input terminals respectively, and first and second inverter output terminals for providing an output voltage to the coil. A control system is configured to monitor a voltage between the first and second input terminals, and control the inverter to adjust the output voltage, based on an offset between the monitored voltage and a target voltage, to at least partially compensate the offset. The wireless charging transmitter may further include an ideal diode coupled between one of the input terminals and the inverter.

Wireless charging transmitter and method for controlling the wireless charging transmitter

Transferring wireless power using a multiple pulse width modulation M-PWM driver signal includes generating the multiple PWM driver signal such that the pulse width varies in accordance with the magnitude of a periodic modulating curve. The M-PWM driver signal adjacent a zero-crossing of the periodic modulating wave is modified by reducing an interval between the zero-crossing and at least one pulse of the M-PWM driver signal closest to the zero-crossing. The modified M-PWM driver signal is used to open and close a switch in a wireless power transfer charging circuit.

Multiple and sinusoidal pulse width modulation for wireless charging

A solid state drive (SSD) includes an NAND memory and an SSD controller. The SSD controller includes an interface coupled to a host machine, a nonvolatile memory controller coupled to the interface, and a processor coupled to the nonvolatile memory controller. The SSD controller is configured to: receive, via the interface, a write command from the host machine; process, by the nonvolatile memory controller, the write command; transmit, from the nonvolatile memory controller to the processor, a system message; process, by the processor according to Zoned Namespaces (ZNS) protocol, the system message; obtain, by the nonvolatile memory controller via the interface, host data for storage from the host machine; and write the host data to the NAND memory based on a result of processing the system message. Processing the system message by the processor and obtaining the host data by the nonvolatile memory controller are executed in parallel.

Programmable control system and method for solid state drive

An SSD includes an MRAM, an NAND memory, and an SSD controller. The SSD controller is configured to receive first data from a host machine, save the first data to an SSD data buffer, fetch the first data from the SSD data buffer and write the first data to the MRAM via the MRAM controller, determine, by the data allocation circuit based on a characteristic of the first data, whether to save the first data to the MRAM or the NAND memory, and in response to determining saving the first data to the NAND memory, read the first data from the MRAM, write the first data to the NAND memory, and erase the first data from the MRAM.

Hybrid solid state drive (SSD) architecture using MRAM and NAND for improved power loss protection and performance

This application describes systems and methods for facilitating memory access on flash drives. An example method may start with receiving a read command on a flash memory from a host specifying a logic block address (LBA). The flash memory may include a plurality of blocks grouped into a plurality of super blocks, and each of the plurality of blocks may include a plurality of pages. The method may further include determining a zone identification and an LBA offset based on the LBA; determining a flash physical address (FPA) corresponding to the LBA by accessing a mapping table stored in a random access memory (RAM) according to the zone identification and the LBA offset (e.g., the mapping table includes a plurality of FPAs arranged in a plurality of zones corresponding to the plurality of super blocks); and determining a page number and a block identification corresponding to the FPA.

Software-hardware combination method for internal mapping address query of zoned namespace

This application describes systems and methods for facilitating memory access in flash drives. An example method performed by a memory controller may include receiving, from a host, a write command comprising data to be written into a flash memory; splitting the data into a first portion and a second portion; storing the first portion into a static random-access memory (SRAM) in the memory controller; storing the second portion into a dynamic random-access memory (DRAM) communicatively coupled with the memory controller; initiating a configuration operation corresponding to the write command; fetching the first portion from the SRAM and the second portion from the DRAM in response to the flash translation layer indicating a ready status to store the data into the flash memory; combining the fetched first portion and the fetched second portion; and storing the combined first portion and the second portion into the flash memory.

Data cache scheme for high performance flash memories

Apparatus and methods of providing digital varying output, such as sinusoidal, pulse width modulation, SPWM, control for an inverter comprising at least a first switch and a second switch are disclosed. The method comprising: generating a first binary control signal at a system modulation frequency; generating a second binary control signal at an M-times higher carrier frequency; wherein generating the second binary control signal comprises: providing a periodic counter having a K-times higher reset frequency; calculating M switch-off moments; determining for each, a corresponding switch-off counter value and a corresponding counter sequence value; storing each switch-off counter value in a respective memory location corresponding to the respective counter sequence and dummy values in the remaining memory locations; and sequentially and periodically transferring the contents of the memory locations to at least one PWM value register.

Apparatus and methods for varying output pulse-width modulation (PWM) control of an inverter

A tool for replacing an escalator drive shaft comprises a first tool and a second tool. One side of the first tool is adapted to be assembled on an original shaft adapter, and the other side of the first tool is adapted to be assembled on a new shaft adapter. The second tool is adapted to be assembled on the first tool. A central axis of the first tool coincides with a central axis of the original shaft adapter, a central axis of the second tool coincides with the central axis of the first tool, and the central axis of the first tool coincides with a central axis of the new shaft adapter. A positioning reference of the original drive shaft is accurately transferred to the new drive shaft by the first and second tools, so that the new drive shaft may be accurately assembled to the position of the original drive shaft with respect to the truss after replacement.

Tool and method for replacing escalator drive spindle

A test script is divided into tests having a sequential order within the test script. An analysis tree of the tests can be generated. Each unique path through the analysis tree includes a subset of the tests as sequentially ordered within the test script. A maximally parallel subset of the unique paths that covers all the tests and according to which the tests are successfully executable is identified. Each test appears in only one unique path of the maximally parallel subset.

Maximally parallel test script execution

The present invention discloses a super large tonnage detachable hook. The hook comprises: a hook rod, a hook shaft, a hook body, a spherical roller bearing, and a thrust spherical roller bearing. The hook also contains a connection component which connects the hook rod to the hook body. The split-type self-locking sleeve is integrally connected to the hook rod via the hook hoop holder. Meshing of the sleeve with the toothed sleeve of the hook rod is adopted to transmit the load, and the bearing capacity is greatly improved compared with the traditional screw connection. The hook of the present invention can withstand the downward and upward bi-directional load, which solves the problem that the traditional hook is prone to damage once it hits the ground. The hook is forged with 30CrNiMo8, which can lift an extremely large weight of more than 5,000 tons.

Super large tonnage detachable hook

A wireless power receiver has over-voltage protection (OVP) circuitry that performs different techniques for different over-voltage conditions. The OVP circuitry includes controllable resistive clamp circuitry (a resistor in series with a resistor control switch) and controllable capacitive clamp circuitry (a capacitor in series with a capacitor control switch). Based on an output-based feedback signal and a reference signal, comparison circuitry generates comparison signals, based on which a controller selectively enables (i) the resistive clamp circuitry intermittently for a relatively low over-voltage condition and continuously for a higher over-voltage condition and (ii) the capacitive clamp circuit to detune the receiver, both in order to decrease the rectified output voltage.

Overvoltage protection circuit for wireless power receiver

Embodiments disclosed herein provide techniques for representing a routing strip in an integrated circuit design using a digit pattern. According to certain aspects, the techniques include methods to display overlapped routing strips of an integrated circuit design when there are ten or more metal layers in the integrated circuit design. According to additional or alternative aspects, the techniques include methods to generate a texture pattern for displaying routing strips in which layer identification and layer direction of each routing strip can be easily discerned. According to further additional or alternative aspects, the techniques include methods to cause texture patterns for displaying routing strips to stagger with respect to each other when the routing strips are overlapped in a display.

Representing a routing strip in an integrated circuit design using a digit pattern

A bridgeless power factor correction (PFC) circuit has first and second nodes, and first and second current paths connected between the first and second nodes. The first current path includes a first semiconductor device and a first switch element, and the second current path includes a second semiconductor device and a second switch element. One of the first and the second current paths further includes first and second sensing elements that are oppositely connected in series.

Power factor correction circuit

A system and method for demodulating a wireless power signal onto which binary data has been modulated involves processing the wireless power signal with analog circuitry to produce a modified power signal in accordance with the type of demodulation used, periodically capturing digital samples of the modified power signal to produce a series of digital samples, applying, with an MCU, at least two digital filtering algorithms to the digital samples to determine transitions associated with the modulation, and recovering, with the MCU, the binary data as a function of the determined transitions. The demodulator is applicable to bidirectional power transfer capable devices and includes algorithms that can be applied similarly to both ASK and FSK demodulations with little or no modification.

Bidirectional communication demodulation for wireless charging system

The embodiments described herein provide a power transmitter for wireless charging of an electronic device and methods of its operation. The power transmitter uses an inverter configured to generate a square wave from a potentially wide ranging DC input voltage. The inverter is configured to generate the square wave with a duty cycle that results in a desired equivalent voltage output, effectively independent of the DC input voltage that is provided. Thus, by generating a square wave with a selectable duty cycle the inverter provides the ability to facilitate wireless power transfer with a wide range of DC input voltages. Furthermore, in some embodiments the power transmitter may provide improved power transfer efficiency using a quasi-resonant phase shift control strategy with adjustable dead time and a matching network that is dynamically selectable to more effectively couple with the transmitter coil combination being used to transmit power to the electronic device.

Growing community of inventors

Shanghai, China

Xiang Gao