Texas Instruments Corporation

Nxp B.v.

Xavier Albinet

Pierre Michel Carbou

Christian V Sorace

Pascal Guigon

A sigma-delta analog-to-digital converter (ADC) is disclosed. The sigma delta ADC has an analog input and a digital output. A sigma-delta modulator input is coupled to the analog input and a sigma-delta modulator output. A first filter having a first filter input is coupled to the sigma-delta modulator output and a first filter output. A second filter having a second filter input is coupled to the sigma-delta modulator output and a second filter output. The sigma-delta ADC operates in a first and second mode. In a first mode, the first filter output is coupled to the digital output. In a second mode, the second filter output is coupled to the digital output.

Sigma-delta analog to digital converter

A digital-to-analog converter (DAC) is described having a digital input, an analogue output, and two capacitors. The DAC has a controller. The controller is configured to generate a switching sequence including at least two switch cycles dependent on the input value received on the digital input. If the input value corresponds to an odd number, in a first switch cycle during a switch cycle first phase, the controller switchably couples a reference voltage to a first terminal and a ground voltage to a second terminal of one of the two capacitors, and switchably couples a ground voltage to a first terminal and the reference voltage to a second terminal of the other of the two capacitors. During a switch cycle second phase, the controller switchably couples a ground voltage to the first terminal and the analogue output to the second terminal of both capacitors.

Digital to analog and analog to digital converter

A Sigma-Delta analog to digital converter (ADC) is described. The Sigma-Delta ADC includes a series arrangement of a gain tracker, a first discrete-time integrator stage and a quantizer between an ADC input and an ADC output. The Sigma-Delta ADC includes a digital to analog converter (DAC) having a DAC input and a DAC output connected to the gain tracker. The Sigma-Delta analog to digital converter includes a controller having a control input connected to the quantizer output. The controller provides a digital input to the DAC input and provides a gain control signal to the gain tracker.

Sigma delta analog to digital converter

A new inverter-based fully-differential amplifier is provided including one or more common-mode feedback transistors coupled to each inverter, which transistors operate in the liner region. Accordingly, due to the fully-differential nature of the new inverter-based fully-differential amplifier, the amplifier provides an improved Power Supply Rejection Ratio (PSRR), provides a reduced sensitivity to supply voltage and process or part variations, and does not require an auto-zeroing technique to be utilized, which ultimately saves power, all while utilizing the low-voltage and low-power advantages of an inverter-based design.

Low-power inverter-based differential amplifier

An audio downlink path is provided including a Dynamic Range Boost (DRB), a modified Digital-to-Analog Converter (DAC), and a modified audio driver gain control to produce a very high Dynamic Range (DR) while maintaining a limited scale and complexity of the components within the audio downlink path.

Digital-to-analog conversion with improved dynamic range

An amplifier comprising an analog amplifier which outputs a first current and a second current. The amplifier also comprises a first digital amplifier coupled to the analog amplifier, the first digital amplifier amplifies a modified version of the first current to produce a third current. The amplifier also comprises a second digital amplifier coupled to the analog amplifier, the second digital amplifier amplifies a modified version of the second current to produce a fourth current. The amplifier also includes connections configured to provide the first, second, third and fourth currents through a load.

Differential amplifier

A digital to analog converter ( ) includes a pulse width modulator ( ) and a class-D amplifier ( ). The class-D amplifier ( ) includes a low pass filter ( ). A differential signal is available from two nodes (outp, outm) on the amplifier. Common mode compensation circuitry ( ) generates a compensation signal during periods where a PWM signal is not being generated to maintain a common mode average value of (Avdd &plus;Avss)/2 from the nodes, without affecting the differential signal.

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Roquefort les Pins, France

Xavier Albinet