Cavium, Inc.

Wu Ye

Bryan Chin

Paul G Scrobohaci

Ahmed Shahid

Najeeb Imran Ansari

Jeffrey Schroeder

Scott A Lurndal

Chee Hu

Michael Carns

Leo Chen

Yoganand Chillarige

Brian Hunter

Jeff Pangborn

Methods and systems are disclosed for routing and distributing interrupts in a multi-processor computer to various processing elements within the computer. A system for distributing the interrupts may include a plurality of logic devices configured in a hierarchical tree structure that distributes incoming interrupts to interrupt redistributors (redistribution devices). The system also includes plural processing elements, where each processing element has an associated bus address. A shared serial bus couples the redistribution devices and processing elements. Each of the redistribution devices is configured to transfer the incoming interrupts to at least one of the processing elements over the common bus, based on the bus address.

Distributed interrupt scheme in a multi-processor system

In one embodiment, a processor comprises a plurality of hardware resources, each hardware resource having a clock cycle. The processor also comprises a plurality of work stores, each work store assigned into one of a plurality of virtual functions if a mode of the processor is set to a virtual function mode, and each work store assigned into one physical function if the mode of the processor is set to a physical function mode. The processor further comprises dispatch logic configured to dispatch work from any work store corresponding to any virtual function or physical function to any released hardware resources.

Processor with dedicated virtual functions and dynamic assignment of functional resources

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Cupertino, CA, United States of America

Wu Ye