United Microelectronics Corp.

National Cheng-kung University

Wu-Sian Sie

Yu-Ting Li

Po-Cheng Huang

Kun-Ju Li

Chih-Hsun Lin

Chia-Lin Hsu

Chun-Tsen Lu

Yi-Liang Liu

Chun-Hsiung Wang

Chia-Lung Chang

Fu-Shou Tsai

Wen-Chin Lin

I-Lun Hung

Chien-Ting Lin

Chih-Chien Liu

Shih-Fang Tzou

Po-Chao Tsao

I-Ming Tseng

Rai-Min Huang

Jei-Ming Chen

Wen-Yi Teng

Yen-Ming Chen

Jui-Min Lee

Kuo-Chin Hung

Chun-Wei Hsu

Jen-Chieh Lin

Chang-Hung Kung

Tzu-Hsiang Hung

Wei-Che Tsao

Shih-Ming Lin

Lan-Ping Chang

Kom-Bei Shiu

A method for manufacturing a semiconductor device is provided. A substrate with an insulation formed thereon is provided, wherein the insulation has plural trenches, and the adjacent trenches are spaced apart from each other. A barrier layer is formed on an upper surface of the insulation and in sidewalls of the trenches, and the barrier layer comprises overhung portions corresponding to the trenches. A seed layer is formed on the barrier layer. Then, an upper portion of the seed layer formed on an upper surface of the barrier layer is removed. An upper portion of the barrier layer is removed for exposing the upper surface of the insulation. Afterwards, the conductors are deposited along the seed layer for filling up the trenches, wherein the top surfaces of the conductors are substantially aligned with the upper surface of the insulation.

Method for manufacturing semiconductor device with a barrier layer having overhung portions

A manufacturing method of a semiconductor device is provided. The manufacturing method includes the following steps. A plurality of fin structures are formed in a first area and a second area of a substrate. A first density of the fin structures in the first area is lower than a second density of the fin structures in the second area. A gate dielectric layer is formed on the fin structures. An amorphous silicon layer is formed on the gate dielectric layer and the fin structures in the first area and the second area. Part of the amorphous silicon layer which is disposed in the first area is annealed to form a crystalline silicon layer by a laser. The crystalline silicon layer disposed in the first area and the amorphous silicon layer disposed in the second area are polished.

Manufacturing method of semiconductor device

A semiconductor process includes the following steps. A dielectric layer is formed on a substrate, where the dielectric layer has at least a dishing from a first top surface. A shrinkable layer is formed to cover the dielectric layer, where the shrinkable layer has a second top surface. A treatment process is performed to shrink a part of the shrinkable layer according to a topography of the second top surface, thereby flattening the second top surface.

Semiconductor process

A method for repairing an oxide layer and a method for manufacturing a semiconductor structure applying the same are provided. The method for repairing an oxide layer comprises following steps. First, a carrier having a first area and a second area is provided, wherein a repairing oxide layer is formed on the second area. Then, the carrier is attached to a substrate with an oxide layer to be repaired formed thereon, wherein the carrier and the substrate are attached to each other through the repairing oxide layer and the oxide layer to be repaired. Thereafter, the oxide layer to be repaired is bonded with the repairing oxide layer.

Method for repairing an oxide layer and method for manufacturing a semiconductor structure applying the same

The present invention provides a manufacturing method for forming a semiconductor structure, in which first, a substrate is provided, a hard mask is disposed on the substrate, the hard mask is then patterned to form a plurality of fin hard masks and a plurality of dummy fin hard masks, afterwards, a pattern transferring process is performed, to transfer the patterns of the fin hard masks and the fin hard masks into the substrate, so as to form a plurality of fin groups and a plurality of dummy fins. Each dummy fin is disposed on the end side of one fin group, and a fin cut process is performed, to remove each dummy fin.

Method for forming a semiconductor structure

A method of fabricating a semiconductor device includes the following steps. A substrate including at least a fin structure is provided, and a material layer is formed to cover the fin structure. Then, a first planarization process is performed on the material layer to form a first material layer, and an oxide layer is formed on the first material layer. Subsequently, the oxide layer is totally removed to expose the first material layer, and a second material layer is formed in-situ on the first material layer after totally removing the oxide layer.

Method of fabricating semiconductor device

A manufacturing method for a shallow trench isolation. First, a substrate is provided, a hard mask layer and a patterned photoresist layer are sequentially formed on the substrate, at least one trench is then formed in the substrate through an etching process, the hard mask layer is removed. Afterwards, a filler is formed at least in the trench and a planarization process is then performed on the filler. Since the planarization process is performed only on the filler, so the dishing phenomenon can effectively be avoided.

Manufacturing method for a shallow trench isolation

The present invention relates to a method of forming an isolation structure, in which, a trench is formed in a substrate through a hard mask, and deposition, etch back, deposition, planarization, and etch back are performed in the order to form an isolation material layer of the isolation structure after the hard mask is removed. A silicon layer may be formed to cover the trench and original surface of the substrate before the former deposition, or to cover a part of the trench and original surface of the substrate after the former etch back and before the later deposition, to serve as a stop layer for the planarization process. Voids existing within the isolation material layer can be exposed or removed by partially etching the isolation material layer by the former etch back. The later deposition can be performed with a less aspect ratio to avoid forming voids.

Method of forming an isolation structure

Synthetic processes for preparing luminescent iridium complexes and precursors thereof are provided. The method employs water as the reaction solvent to prepare luminescent iridium complexes in two different ways. In the first way, a precursor [Ir(CNR)I] (Formula I) is prepared from one of IrCl, MIrCl(M=Li, Na, K) and [Ir(CNR)Cl], and then the precursor [Ir(CNR)I] is converted into one of the two luminescent iridium isomeric complexes [Ir(CNR)(CNR')] (Formula II). In the second way, a metal complex IrClor MIrCl(M=Li, Na, K), HCNRand a base are converted selectively into one of the two iridium isomeric complexes [Ir(CNR)] (Formula VIII). Herein, R and R&#x2032; are defined the same as the specification.

Preparation of luminescent iridium complexes and precursors thereof

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Tainan, Taiwan

Wu-Sian Sie