Au Optronics Corporation

Wu-Hsiung Lin

Wei-Ming Huang

Jia-Hong Ye

Po-Hsueh Chen

Ming-Hsien Lee

Chia-Tien Peng

An-Thung Cho

Ming-Wei Sun

Chao-Chien Chiu

Chun-Hsiun Chen

Chia-Kai Chen

Wan-Yi Liu

Chung-Tao Chen

Ssu-Hui Lu

Shin-Shueh Chen

Guang-Ren Shen

An active device array substrate includes a flexible substrate, a gate electrode, a dielectric layer, a channel layer, a source electrode, a drain electrode, and a pixel electrode. The flexible substrate has a transistor region and a transparent region adjacent to each other. The gate electrode is disposed on the transistor region. The dielectric layer covers the flexible substrate and the gate electrode. A portion of the dielectric layer disposed on the gate electrode has a first thickness. Another portion of the dielectric layer disposed on the transparent region has a second thickness less than the first thickness. The channel layer is disposed above the gate electrode. The source electrode and the drain electrode are electrically connected to the channel layer. The pixel electrode is disposed on the dielectric layer which is disposed on the transparent region. The pixel electrode is electrically connected to the drain electrode.

Active device array substrate

A method of forming TFT is provided. The TFT includes a gate electrode, a gate insulating layer, a first protective pattern, a second protective pattern, a source electrode, a drain electrode, a semiconductor channel layer, and a passivation layer. The first protective pattern and the second protective pattern are disposed on the gate insulating layer above the gate electrode. The source electrode is disposed on the gate insulating layer and the first protective pattern. The drain electrode is disposed on the gate insulating layer and the second protective pattern. The semiconductor channel layer is disposed on the gate insulating layer, the source electrode, and the drain electrode. In an extending direction from the source electrode to the drain electrode, a length of the first protective pattern is shorter than that of the source electrode, and a length of the second protective pattern is shorter than that of the drain electrode.

Method of forming thin film transistor

A method for manufacturing an active device array substrate includes providing a flexible substrate having a transistor region and a transparent region; forming a gate electrode on the transistor region; sequentially forming a dielectric layer and a semiconductor layer to cover the gate electrode and the flexible substrate; removing a part of the semiconductor layer to form a channel layer above the gate electrode and removing a thickness of the dielectric layer disposed on the transparent region, such that a portion of the dielectric layer on the gate electrode has a first thickness, and another portion of the dielectric layer on the transparent region has a second thickness less than the first thickness; respectively forming a source electrode and a drain electrode on opposite sides of the channel layer; and forming a pixel electrode electrically connected to the drain electrode.

Active device array substrate and manufacturing method thereof

A thin film transistor disposed on a substrate is provided. The thin film transistor includes a gate, a gate insulating layer, a silicon-rich channel layer, a source, and a drain. The gate is disposed on the substrate. The gate insulator is disposed over the gate. The silicon-rich channel layer is disposed above the gate, wherein the material of the silicon-rich channel layer is selected from a group consisting of silicon-rich silicon oxide (Si-rich SiOx), silicon-rich silicon nitride (Si-rich SiNx), silicon-rich silicon oxynitride (Si-rich SiOxNy), silicon-rich silicon carbide (Si-rich SiC) and silicon-rich silicon oxycarbide (Si-rich SiOC). The content (concentration) of silicon of the silicon-rich channel layer within a film depth between 10 nm to 170 nm ranges from about 1E23 atoms/cmto about 4E23 atoms/cm. The source and the drain are connected with the silicon-rich channel layer.

Thin film transistor

A thin film transistor (TFT) includes a gate electrode, a gate insulating layer, a first protective pattern, a second protective pattern, a source electrode, a drain electrode, a semiconductor channel layer, and a passivation layer. The first protective pattern and the second protective pattern are disposed on the gate insulating layer above the gate electrode. The source electrode is disposed on the gate insulating layer and the first protective pattern. The drain electrode is disposed on the gate insulating layer and the second protective pattern. The semiconductor channel layer is disposed on the gate insulating layer, the source electrode, and the drain electrode. In an extending direction from the source electrode to the drain electrode, a length of the first protective pattern is shorter than that of the source electrode, and a length of the second protective pattern is shorter than that of the drain electrode.

Thin film transistor of display panel and method of making the same

A pixel structure and a manufacturing method thereof are provided. In the pixel structure, an electrode of a storage capacitor is formed when an active layer is formed, and the electrode and the active layer are made of the same material. The material of the electrode and the active layer can be an oxide semiconductor with high transmittance. Therefore, a stable display frame of the pixel structure can be provided by the storage capacitor, an aperture ratio of the pixel structure can be improved, and power consumption can be further reduced.

Pixel structure and manufacturing method thereof

A TFT including a gate, a gate insulation layer, an oxide semiconductor layer, a translucent layer, a source, and a drain. The gate insulation layer covers the gate. The oxide semiconductor layer is disposed on the gate insulation layer and located above the gate. The oxide semiconductor layer includes an oxide channel layer and two ohmic contact layers. The ohmic contact layers are respectively located beside the oxide channel layer and connected with the oxide channel layer. The translucent layer is located above the oxide channel layer. The source and the drain are disposed on the gate insulation layer and the ohmic contact layers. The source and the drain are electrically insulated from each other.

A method of fabricating a thin film transistor including: forming a gate on a substrate; forming a gate insulation layer on the substrate to cover the gate; forming an oxide semiconductor layer on the gate insulation layer; forming a translucent layer on a partial region of the oxide semiconductor layer; performing an optical annealing process to transform the oxide semiconductor layer into an oxide channel layer and two ohmic contact layers by using the translucent layer as a mask, where the oxide channel layer is located under the translucent layer, and the ohmic contact layers are respectively located beside the oxide channel layer and are connected with the oxide channel layer; and forming a source and a drain electrically insulated from each other on the gate insulation layer and the ohmic contact layers.

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Hsinchu, Taiwan

Wu-Hsiung Lin