Qualcomm Incorporated

Samsung Electro-Mechanics Co., Ltd.

Georgia Tech Research Corporation

Woonyun Kim

Chang-Ho Lee

Minsik Ahn

Ki Seok Yang

Jeonghu Han

Jeongwon Cha

Joy Laskar

Aristotele Hadjichristos

Jaejoon Chang

Yunseo Park

Jae Joon Chang

Jihwan Kim

An adaptive bias circuit for a power amplifier may include a terminal node coupled to the power amplifier. The adaptive bias circuit may also include a low impedance bias circuit coupled to the terminal node. The adaptive bias circuit may further include a high drive bias circuit coupled to the low impedance bias circuit through the terminal node. A separation device may be arranged between the low impedance bias circuit and the high drive bias circuit.

Low impedance adaptive bias scheme for power amplifier

A circuit includes a first transistor comprising a gate, a source, and a drain, and an inductor coupled between the gate and the source of the first transistor, wherein the source is further coupled to a current source and the gate is further coupled to an amplifier.

Adaptive bias circuit for a radio frequency (RF) amplifier

Exemplary embodiments are directed to an amplifier module which may comprise a transmit path including a first amplifier and a second amplifier. The exemplary amplifier module may further include a transformer coupled between the first amplifier and the second amplifier and switchably configured for coupling the first amplifier in series with the second amplifier in a first mode and coupling the first amplifier to bypass the second amplifier in a second mode.

Multi-mode multi-band power amplifiers

Systems and methods may include an amplifier having at least a first input port, where the amplifier includes a first capacitance associated with the first input port; a first bias circuit, where the first bias circuit comprises a series connection of a first charging circuit and a first discharging circuit, wherein a first node between the first charging circuit and the first discharging circuit is connected to the first input port, wherein responsive to an RF input signal having at least a first predetermined level being received at the first input port, the first charging circuit charges the first capacitance associated with the first input port during a first portion of a cycle of the RF input signal, and discharges the first capacitance associated with the first input port during a second portion of the cycle, thereby controlling a DC bias voltage level available at the first input port.

Systems and methods for adaptive bias circuits for a power amplifier

Systems and methods are provided for overlapping compact multiple transformers. The systems and methods may include a first transformer section that includes a first primary winding section and a first secondary winding, where the first primary winding section is inductively coupled to the first secondary winding, where the first transformer section is associated with a first rotational current flow direction in the first primary winding section; and a second transformer section that includes a second primary winding section and a second secondary winding, where the second primary winding section is inductively coupled to the second secondary winding, wherein the second transformer section is associated with a second rotational current flow direction in the second primary winding section, where a first portion of the first primary winding section is adjacent to a second portion of the second primary winding section, where the adjacent first and second portions include a substantially same first linear current flow direction.

Overlapping compact multiple transformers

A multi-primary and distributed transformer is provided for one or more sets of parallel-connected or series-connected power amplifiers. The transformer may include a plurality of primary windings, including a first primary winding, a second primary winding, a third primary winding, and a fourth primary winding, where each of the plurality of primary windings is not directly connected to any other of the plurality of primary windings, where each primary winding includes a respective positive port and a negative port for receiving respective differential signals, where each primary winding include a respective first number of turns; and a single secondary winding having a plurality of segments, including a first segment and a second segment, where each segment includes a second number of turns, the second number of turns greater than or equal to the respective first number of turns, where the single secondary winding includes at least one output port.

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San Diego, CA, United States of America

Woonyun Kim