Lsis Co., Ltd.

Yonsei University

Corporation Foundation

Wook Hwa Lee

Yong Ho Chung

Seung Taek Baek

Gum Tae Son

Kyeon Hur

Hee Jin Lee

Teag Sun Jung

Jung Wook Park

Jun Bum Kwon

Young Woo Kim

Eui Cheol Nho

Byung Moon Han

Tae Sik Nam

Seoung Taek Baek

Provided is a synthetic test circuit for synthetic-testing a thyristor valve in high voltage direct current (HVDC). A resonant circuit applies forward DC current, a reverse DC voltage, and a forward DC voltage to synthetic-test the thyristor valve. A current generation unit generates DC current that is above a reference current value to supply the generated DC current into the resonant circuit. A voltage generates unit generating a DC voltage that is above a reference voltage value to supply the generated DC voltage into the resonant circuit. The resonant circuit includes a charging auxiliary valve for charging a gate driver of the thyristor valve.

Test circuit for thyristor valve in HVDC system

The present disclosure provides a method for controlling a multilevel converter, the method including, detecting modulation state values and current directions of sub-modules, and designating, by one sub-module, an average number of switching for each period of an output waveform, wherein the step of designating the average number of switching includes, grouping the sub-modules according to being in ON state or in OFF state, comparing the number of sub-modules in previous ON state and the number of sub-modules in OFF state to obtain a difference therebetween, and changing a state as much as the difference, comparing a sub-module of ON state in charged state and in discharged state with a sub-module of OFF state, and changing the compared states of sub-modules of ON state and OFF state.

Method for controlling multilevel converter

Disclosed is a HVDC valve tower. The HVDC valve tower includes cylindrical valve module loading part, a valve module loaded on the valve module loading part, and a crane disposed at a center of the valve module loading part to be rotatable.

HVDC valve tower

An apparatus for testing a thyristor valve includes: a current source circuit that provides an electric current when a thyristor valve as a test target is turned on; a voltage source circuit that provides a reverse voltage or a forward voltage when the thyristor valve is turned off; and a first auxiliary valve provided between a connection point between the thyristor valve and the voltage source circuit and the current source circuit, and that insulates the current source circuit from the voltage source circuit to protect the current source circuit from a high voltage of the voltage source circuit.

Apparatus for testing thyristor valve

A method of controlling a multilevel converter is provided. In the method of controlling a multilevel converter according to an embodiment, a sub-module having the maximum voltage and a sub-module having the minimum voltage respectively are extracted from among a plurality of sub-modules. An amount of state variation of each of the plurality of sub-modules is determined. When the amount of state variation is not determined to be 0, a direction of a current flowing through the plurality of sub-modules is detected. A subsequent state of at least one sub-module is determined according to at least one of the amount of the state variation and current direction. Subsequently an arrangement time for sub-module values can be efficiently reduced while the number of the sub-modules increases in the voltage balancing.

Method of controlling multi level converter

Growing community of inventors

Incheon-si, South Korea

Wook Hwa Lee