Neoconix, Inc

Woody Maynard

Gary Hsieh

Mayuresh Patki

David Chen

An electrical connector includes a contact array of signal pins and an integrated ground plane. In one embodiment, the electrical connector includes an array of contact elements and the integrated ground plane includes openings for contact elements forming signal pins and includes closed portions positioned over contact elements to be connected to the ground potential. The array of contact elements is formed with a subset of the contact elements being trapped or compressed under the integrated ground plane. The trapped contact elements are electrically connected to the ground potential without each being connected to a ground connection external to the connector. The integrated ground plane can be provided integrally within the electrical connector or as a separate element attached to the connector. In another embodiment, an electrical connector includes an array of contact elements formed in a contact element layer incorporating an integrated ground plane.

Electrical connector with integrated ground plane

A connector for electrically connecting to conductive structures formed on a semiconductor device includes a core with first, second and third ground planes isolated from each other and signal vias and ground vias formed therein, conductive signal traces formed coplanar with the second ground plane and isolated from a conductive ground layer forming the second ground plane, where one or more conductive signal traces are shielded by the conductive ground layer and by the first and third ground planes. The connector includes a first set of contact elements electrically connected to signal vias that are electrically connected to first ends of the conductive signal traces and a second set of contact elements electrically connected to signal vias that are electrically connected to second ends of the conductive signal traces.

Connector including signal pins shielded by buried ground vias

A connector for electrically connecting to conductive structures formed on a semiconductor device includes a core including an isolation layer and signal vias and ground vias formed in the isolation layer; a first ground plane formed on a surface of or in the core and electrically connected to the ground vias; a first set of contact elements formed on a first surface of the core and electrically connected to the signal vias to form signal pins; a second set of contact elements formed on the first surface and electrically connected to a subset of the ground vias to form ground pins. The remaining ground vias without contact elements form buried ground vias. The first and second sets of contact elements are arranged on the first surface of the core to surround each signal pin by at least one adjacent ground pin and one or more adjacent buried ground vias.

Growing community of inventors

State College, PA, United States of America

Woody Maynard